Fujitsu to detail third-generation SPARC specs: on-chip FPU will boost execution to 5 MFLOPS. (includes a related article on the introduction of the PCXI system at Wescon) (product announcement)

EDN, October, 1990 by Arnold, Bill

Fujitsu to detail third-generation SPARC specs ANAHEIM, CA--Fujitsu will preview the technical details of its planned third-generation SPARC RISC processor, which will include an on-chip floating-point unit (FPU), to selected customers next month here at Wescon. Samples of the chip, tentatively named the MB86903, won't be available until first quarter of 1991.

It's not yet clear which manufacturer's FPU design will be adopted by Fujitsu. At press time, a seemingly firm agreement with Weitek to incorporate its 3171 FPU design onto the Fujitsu chip had hit a snag, according to a source familiar with the negotiations. In any case, Fujitsu maintains that its next SPARC processor will have on-chip FPU and that a possible alternate source is already lined up....

Read the rest of this article with a Free Trial at HighBeam Research.

Premium Content Partnership | HighBeam Research provides an in-depth online archive library of reference works.