Tool set joins synthesis with simulation for reliable ASIC design. (application specific integrated circuit) (Mentor Graphics Corp.'s Top Down Design-Solver) (Product Announcement)

EDN, November, 1992 by Napier, John C.

Right-first-time silicon, the Holy Grail of the EDA (electronic-design-automation) industry, is being sought and found on routine designs. But, below 1-[mu]m-feature size and above 60,000 gates or a 33-MHz clock rate, advanced ASIC designs tend to frustrate the quest for predictability. The more complex tools required for such designs often operate at cross purposes with each other--in particular, the synthesis and simulation features of advanced-design tool sets that rely on successive estimations, approximations, and generalizations. Recently developed tools also let users specify constraints and rules for the tools to use, increasing the probability of conflict between the assumptions that various tools make about your design.

The Top Down Design-Solver...

Read the rest of this article with a Free Trial at HighBeam Research.

Premium Content Partnership | HighBeam Research provides an in-depth online archive library of reference works.