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Test & Measurement World, December, 2006
By Staff JTAG, EDA, and ATE products take center stage Staff International Test Conference, October 23-27, Santa Clara, CA. IEEE. www.itctestweek.org . Synopsys (www.viragelogic.com ) on a test-reference design flow for testing and repairing embedded memories for SOC designs. The Semiconductor Test Consortium (www.corelis.com ) demonstrated its ScanExpress boundary-scan test and programming system. Mentor Graphics (www.logicvision.com ) unveiled its ScanBurst tool and announced that it has partnered with Mentor to deliver at-speed test for high-speed nanometer designs. Electroglas (www.optimaltest.com ) unveiled its Test Management Solutions (TMS) software for managing the entire IC testing process. JTAG Technologies...
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