Detection and classification of defect patterns on semiconductor wafers

IIE Transactions, Dec, 2006 by Chih-Hsuan Wang, Way Kuo, Halima Bensmail

1. Introduction

The manufacture of integrated circuits is a complex and costly process that involves hundreds of steps and requires the monitoring of many process parameters throughout the production process. Today, even using highly automated and precisely positioned equipment located in a near-dust-free clean room and operated by well-trained process engineers, the occurrence of point defects still cannot be avoided (Kuo et al, 1998; Kuo and Kim, 1999). Since clustered point defects on a wafer are often due to process problems or human mistakes, information about cluster size, geometric shape, and spatial location is extremely valuable to process engineers seeking to recognize potential production problems. In general, defect patterns can be regarded as a superposition of two main components acting independently (Friedman et al., 1997; Hansen et al., 1997): the first is random point defects (particle related) and the second is systematic clusters (process related). Random point defects are often regarded as being due to problems in the clean room and tend to rise and fall with the overall cleanliness of the environment. Systematic defects caused by assignable cause are, however, usually attributed to process equipment faults and/or human mistakes.

Reducing random point defects needs a long-term gradual improvement in clean room operation protocols or an expensive equipment overhaul, however, removing systematic defects requires a series of automatic detection and classification processes. An important objective of defect recognition (including defect detection and defect classification) is the early identification of process problems (Chou et al., 1997). Defect detection consists in removing the random defects from the measured data (denoising) whilst defect classification consists in sorting systematic defects into a set of predefined and meaningful categories. The defect patterns on a wafer contain useful information which can be used to highlight potential manufacturing problems for example: (i) an elliptical zone often arises due to problems in the thin film deposition process; (ii) a circular ring is due to problems in the etching step; and (iii) a linear scratch is a result of machine handling problems (Chen and Liu, 2000; Liu et al., 2002). In addition, if the pattern is located around the wafer center (bulls eye) or along the wafer's edge (circular ring), this may be a result of nonuniformities created in the thin film deposition process or an uneven temperature distribution during the rapid thermal annealing process (Hansen et al., 1997). Therefore, identifying meaningful defect patterns on a wafer and relating them to their root causes is a critical step towards successful semiconductor manufacture.

Traditionally, the problem of defect recognition is addressed through visual inspection by quality engineers using a scanning electron microscope. This manual approach results in numerous misidentifications and is expensive in terms of personnel costs. Since the large amount of data generated in semiconductor manufacturing makes manual checking extremely time consuming and relatively difficult, current research (Chou et al., 1997) is focused on delegating this task to Automatic Defect Detection (ADD) and Automatic Defect Classification (ADC) processes. Automating the detection and classification processes leads to: (i) a reduction in the operator workload; (ii) more defects being reviewed; and (iii) an improvement in both the accuracy and consistency. The expected reduction in individual chip size coupled with an increase in the size of processed wafers from 8 inches to 12 inches means that techniques such as ADD and ADC are becoming increasingly desirable. In real applications, however, it is quite difficult to determine the number of systematic clusters and then to separate the convex (linear scratch, elliptic zone) and nonconvex (circular ring) defect patterns simultaneously. Therefore, an integrated approach composed of a spatial filter, a classification module and an estimation module is proposed to solve these problems. The remainder of this paper is organized as follows. Section 2 reviews the relevant literature and model formulations are presented in Section 3. In Section 4, experimental studies are reported. Conclusions are drawn in Section 5.

2. Literature review

There are numerous papers on yield modeling using classical Poisson, compound Poisson, and generalized Poisson models (Cunningham, 1990; Raghavachari et al., 1997). A Poisson model was the first model to be used to explain the occurrence of defects on semiconductor wafers. Simply speaking, the classical Poisson model implies that: (i) the occurrence of a defect at a location on a wafer is independent of the defects at other locations; and (ii) the likelihood of the occurrence of a defect is almost the same at all locations (Ferris-Prabhu, 1990). It should be noted that the assumption of spatial homogeneity needs a randomness test to guarantee its validity. Jun et al. (1999) proposed the use of a cluster index created by projecting the locations of defects along the X and Y axes on to a wafer map. By checking the uniformity of the distribution of the step distance along the two axes, it is possible to conclude whether or not the randomness property holds. Taam and Hamada (1993) used joint-count statistics around a king-move chessboard to test the randomness of defect patterns. If the randomness of the homogeneous Poisson model holds, the summation of good-good dies with bad-bad dies (GG BB) should be almost equal to twice the number of good-bad dies (GB BG).