Detection and classification of defect patterns on semiconductor wafers

IIE Transactions, Dec, 2006 by Chih-Hsuan Wang, Way Kuo, Halima Bensmail

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5. Conclusions

It is of considerable interest to process engineers to understand the nature of defects produced on wafers during semiconductor manufacture. Without an automated approach, however, gathering and analyzing the defect patterns is not only tedious and time consuming but also gives results with a low accuracy. The type of defect clusters on a wafer depend on the manufacturing process and thus they can be used to highlight specific manufacturing process problems. The proposed approach makes automatic recognition of defect patterns feasible, not only in terms of ADD but also ADC. In particular, a hybrid method combining hierarchical clustering with K-means partitioning is proposed to solve two difficult problems in real application: (i) to specify the number of clusters; and (ii) to identify the different defect patterns when both convex and nonconvex clusters simultaneously occur on a wafer. Furthermore, a Gaussian EM algorithm is used to classify both linear patterns and elliptic patterns and a spherical-shell algorithm is used to classify ring patterns. The presented results show that these three typical categories of defect patterns can be successfully extracted and classified, and their parameters can be precisely estimated. The proposed method should be able to be applied to other industries, such as LCD and PCB manufacture.

Acknowledgements

The authors are grateful to numerous valuable comments provided by the two anonymous referees. This research was partially supported by the National Science Council of Taiwan under NSC 92-2917-I-002024 and under NSF project DMI-0429716.

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