Analog Devices Introduces New Class of DSP For Telecommunications Infrastructure Applications - Product Announcement

Cambridge Telcom Report, Dec 13, 1999

Analog Devices, Inc. Monday introduced the first digital signal processor (DSP) to use the company's newest DSP architecture, TigerSHARC. The ADSP-TS001 TigerSHARC DSP targets telecommunications infrastructure equipment with a new level of integration and the unique ability to process 8-, 16-, 32-bit and floating-point data types on a single chip. Each of these data types is critical to the next generation of telecommunications protocols currently under development, including IMT-2000 (also known as 3G wireless), and xDSL (digital subscriber line). Unlike any other DSP, the ADSP-TS001 has the unique ability to accelerate processing speed based on the data type. Moreover, the chip delivers the highest performance floating-point processing, continuing ADI's leadership in this segment of the market.

"Expectations regarding broadband technologies have been high but the tools that are required for mass-market implementation of such services 7have been missing," said Andy Fuertes, senior analyst at Allied Business Intelligence. "Analog Devices' TigerSHARC ends that. It provides the signal processing power and flexibility that designers of third-generation cellular and other broadband systems need at a price that will translate into commercial success for operators and equipment manufacturers. With this chip, the company has surpassed the price/performance levels of its competitors, and its design will translate directly into greater penetration of broadband services."

In telecommunications infrastructure equipment, voice coder and channel coder protocols are developed around 16-bit data types. To improve signal quality, many telecom applications employ line equalization and echo cancellation techniques that boost overall signal quality and system performance. These algorithms benefit from the added precision of 32-bit and floating-point data processing. The 8-bit native support is well-suited to the commonly used Viterbi channel decoder algorithm, as well as image processing where it is more straightforward and cost-effective to represent the red, green and blue components of the signal with 8-bit data types.

Breakthrough in DSP integration The ADSP-TS001 TigerSHARC DSP is the industry's most highly integrated DSP. On one chip, ADI has integrated 6 Megabits of SRAM (Static Random Access Memory), fixed- and floating-point cores, four bi-directional link ports, a 64-bit external port, 14 DMA (Direct Memory Access) channels and 128 registers. ADI's leadership DSP and memory integration capability is evident in the ADSP-TS001 TigerSHARC DSP, which integrates 50 percent more on-chip memory than previously available solutions from ADI. For large-scale applications that require clusters of DSPs, ADI has integrated its patented link port technology, enabling direct chip-to-chip connections without the need for complex external circuitry.

Memory and I/O integration are carefully chosen to enable maximum data flow to and from the very high-speed core computational blocks. The DSP offers high-bandwidth internal memory access with the equivalent of 38,400 T1 lines or more than 900,000 simultaneous phone calls moved in one second. This extremely high throughput assures a steady flow of data to and from the core -- enabling the high-sustained performance other processors lack.

TigerSHARC Architectural Advantages TigerSHARC employs a Static Superscalar architecture that can execute more multiply-accumulates (MAC) in a single cycle than any other DSP architecture. A MAC is a fundamental instruction required for signal processing and is commonly used to measure true performance in real-time applications.

The ADSP-TS001 processes 1.2 billion MACs per second for 16-bit fixed-point processing. The fixed-point Fast Fourier Transform (FFT) performance is a record setting 7.3 microseconds. The ADSP-TS001 also achieves the industry's highest floating-point performance for a DSP, executing an FFT in 69 microseconds. The FFT is a quintessential algorithm used throughout real-time signal processing applications. This unprecedented 32-bit speed is derived from the chip's ability to process 900 million floating-point operations per second (MFLOPS), an increase of 50 percent over ADI's top-performing SHARC DSPs.

Assembly Programmable, Compiler Friendly The TigerSHARC platform offers DSP designers a flexible development environment that supports both C and assembly language programming. TigerSHARC features robust and efficient C-compiler tools, achieving up to 70 percent compiler efficiency. For time-critical inner loops, DSP programmers can turn to the machine's assembly language to guarantee high-performance code. The TigerSHARC platform, despite its sophisticated architecture, is practical to program in assembly, with features such as an easy-to-learn algebraic assembly language syntax, predictable 2-cycle delay for all computations, 128 fully interlocked, general-purpose registers, and branch prediction.