Hitachi Introduces Single-Chip, High-Frequency Signal Processing Integrated Circuit for Digital Cellular Standards - HD155131TF - Product Announcement

Cambridge Telcom Report, Jan 17, 2000

Hitachi Semiconductor (America) Inc. Monday announced a new, highly integrated circuit (IC), the HD155131TF, for digital cellular systems, personal communications networks and various mobile communications systems. Using a 0.35-micron BiCMOS process, the HD155131TF IC integrates most of the transmit/receive signal processing in radio frequency (RF) block functions for dual-band use in a single chip using silicon-on-insulator (SOI) technology. This is the first device from Hitachi to use the SOI process which enables excellent power consumption.

The HD155131TF IC simplifies the design of digital cellular systems by supporting the GSM-PCS (Global System for Mobile Communications/Personal Cellular System), GSM-900 and DCS-1800/1900 (Digital Cellular System) standards on a single chip that reduces system size, cost and power consumption.

A low-power-consumption design is used with a low operating voltage range of 2.7 volts (V) to 3.3V, and current dissipation of 45 milliamps (mA) when transmitting, 60 mA when receiving, and 1mA or less in power-save mode. The thin-quad flat package-56 (TQFP-56) allows compact mounting, and enables portable telephones to be made smaller and lighter by reducing the required mounting area.

Transmit/Receive Features and Benefits

On the transmit side, out-of-band noise is reduced through the use of an offset phase-locked-loop (PLL) system, while the number of parts has been reduced, including the Surface Acoustic Wave (SAW) filter and duplexer, or wave divider, previously required in the antenna block. In addition, the programmable gain control amplifier (PGA) circuit on the receiving side is controlled via a serial interface. A 98-decibel (dB) dynamic range and efficient linearity have been achieved as gain characteristics, enabling software control of the baseband block.

On the receiving side, the HD155131TF IC incorporates a dual phase PLL synthesizer plus a low-noise amplifier for a dual 900 megahertz- (MHz) and 1800MHz-band use and enables the voltage controlled oscillator tuning band to be minimized through the use of a double superheterodyne method, which allows a flexible frequency plan to be selected. In addition, an offset PLL system is used for frequency conversion on the transmitting side, making a system antenna block duplexer, or wave divider, unnecessary, thereby eliminating the power loss associated with a duplexer.

Pricing, Packaging and Availability

Hitachi's HD155131TF integrated circuit will be priced at $6 in 10,000-unit quantities and is packaged in a TQFP-56. Engineering samples are scheduled for availability in January 2000 with volume production scheduled for April 2000.

Hitachi Semiconductor (America) Inc. -- a subsidiary of Hitachi America, Ltd., in turn a subsidiary of Hitachi, Ltd. (NYSE: HIT) -- supports the requirements of the North American marketplace with a broad range of standard and low-power semiconductor solutions. Offering some of the industry's most popular RISC microprocessors and memory components among other semiconductor solutions, Hitachi provides chips to the world's leading device manufacturers within industrial, consumer and emerging market applications.

COPYRIGHT 2000 EDGE Publishing
COPYRIGHT 2000 Gale Group

 

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