Demonstration system for using shipboard-relative GPS

GPS World, April, 2005 by Kathleen Boseley, Jim Waid

Dual Processors

As depicted in Figure 1, the demonstration system uses two stand-alone common application system processors (CASPs). The primary CASP hosts a MOTS proprietary software providing all the standard processing functionality, including formation of the absolute navigation solution. It also handles the new capabilities for the program, including Sea Based JPALS--specific I/O.

The second CASP occupies a formerly spare card slot and hosts the Sea Based JPALS processing functions. These functions include the formation of both the float and fixed relative navigation solutions, the resolution of the DD carrier phase ambiguities, the calculation of integrity parameters, and the relative vector stabilization algorithms. The two CASPs communicate via a 1-megabit synchronous data link control (SDLC) RS-422 serial interface.

The second CASP also provides an additional 1553 network, which outputs raw line of sight measurements and Honeywell's relative vector to the Naval Avionics Platform Integration Emulator (NAPIE). The NAPIE can be installed in an instrumentation pallet and is primarily designed for rapid prototyping to enable new avionics to be easily integrated and tested.

To accommodate the second CASP, the master interconnect board (MIB) had to be reworked. The extent of this rework focused on starting with an existing MIB and incorporating some minor jumpers and isolations to enable communication between the two CASPs. This effort has been completed on the three demonstration H-764 ACEs required for delivery. The two CASPs have been successfully integrated and the serial interface is working, having recently transmitted 200 million messages with no errors.

As part of an internally funded development effort at Honeywell, the design for a single card incorporating dual processors has been completed and the effort is on track for production in late 2005. These plans include dual processors with a 100 MHz SDRAM interface, six serial controllers and two independent 1553 data bus interfaces. The dual processor card will also provide an Ethernet interface. This single-card dual-processor configuration will replace the two stand-alone CASPs, which will free up an additional slot and provide additional growth potential to host both the Sea Based JPALS and local differential GPS capabilities.

The Sea Based JPALS performance requirements have driven Honeywell towards an RKCPT solution, which requires dual frequency tracking to form a wide-lane. The main reason for implementing a 24-channel receiver is the ability to track both L1 and L2 signals from multiple GPS satellites and use the line-of-sight data to form the wide-lane solution. Differencing L1 and L2 forms the wide-lane observable. The corresponding wavelength is 86.2 cm, which is significantly longer than 19- and 24.4-centimeter wavelengths of the L1 and L2 carrier phases, respectively, and provides increased ambiguity spacing in the search volume. This inherently reduces the number of ambiguities and thus reduces the time to resolve them.