VLSI Technology's New, High-Speed, 16-bit Data Encryption Chip Designed Into HP Cable Modem Family; DES IC Targets System Data Security for High-Speed Cable Modems

Business Wire, Nov 6, 1995

SAN JOSE, Calif.--(BUSINESS WIRE)--Nov. 6, 1995--VLSI Technology, Inc., (NASDAQ: VLSI) of San Jose, CA today announced a design win with Hewlett-Packard Company (NYSE: HWP) for the VLSI VMS110 coprocessor, a high-speed ciphering engine supporting the industry standard Data Encryption Standard (DES) algorithm.

The VMS110 has been designed to become a data security standard in virtually any type of cable modem application. The VMS110 supports both single DES ECB (electronic code book) and CBC (cipher block chaining) encryption/decryption and is NIST (National Institute of Standards and Technology) certified. The VMS110 uses a simple 16-bit data bus and is controlled by programmable registers allowing easy system integration for cable modem applications and other high-speed datastreams. Product samples are available now with volume production starting in the first quarter of 1996.

"VLSI's experience in designing encryption chips combined with our ASIC expertise allowed us to quickly respond to HP's design requirements for a high-speed 16-bit DES engine. It is VLSI's strategy to join forces with industry leaders in a number of growth markets, such as HP in cable modems, to deliver complete systems on silicon that solve real product design issues. With HP's assistance, this part was designed to comply with the DES industry standard for cable modem security," said Don Ciffone, vice president and general manager, VLSI Technology.

"VLSI has developed a chip that meets our needs for a highly secure cable modem," said Bill Hahn, operations manager for HP's Home Products Division. "We are very pleased about the VMS110 because, in addition to already being NIST certified, this chip is based on a non-proprietary standard, is specifically designed for consumer products, and will be flexible enough to handle faster data rates in the future."

The VMS110 will be used in HP's cable modem. A cable modem utilizes a cable company's hybrid fiber/coax infrastructure to make PC access to on-line services and the Internet much faster than a telephone modem. On-line services enable consumers to send and receive electronic mail, access electronic bulletin boards, and participate in special interest forums.

VLSI takes advantage of an ASIC heritage and FSB (functional system block) design methodology integrating many complex circuits onto a single chip. "By taking our existing encryption FSBs and simply reconfiguring them into a custom product we were able to get from initial design specification to device tapeout in five weeks, compared to the estimated four-month development cycle of starting from scratch," said Richard Takahashi, director of VLSI's Advanced Systems Development Group.

Using VLSI's integration capabilities, customers are able to buy chips optimized for performance, power and cost. VLSI's focus on hardware, versus software, encryption is the result of years of experience working with government agencies which time and again has demonstrated that "hard-to-crack" encryption needs to be done in hardware. From this experience, VLSI has found that encryption software running on a general purpose microprocessor is susceptible to many different types of attacks that are ineffective against a highly integrated hardware solution.

Originally developed using HP as a beta customer, the VMS110 is an ASIC for HP's cable modem program, allowing PC users to receive data at Ethernet rates or hundreds of times faster than traditional phone modems which are currently maxed out at 28 kilo-bits/second.

Product Detail

The VMS110 uses a 16-bit bi-directional data bus and appears as a 16-bit peripheral to the host processor. The 16-bit architecture makes interfacing to 16-bit microcontrollers much easier than existing 8-bit solutions. The VMS110 is a fully static design and supports clock rates up to 40 MHz. Pipelined encryption/decryption for continuous blocks of data is implemented for both ECB and CBC modes which results in data throughput up to 284 Mbits/second. The VMS110 is fully DES-compliant (as specified by Federal Information Processing Standards Publication, FIPS PUB 46-2). The VMS110 also supports a bypass mode.

The VMS110 is controlled by the host processor via an address field, control/status lines, and data bus. The DATA I/O port is used to input: keys; read/write status; input control; and read/write data. The host processor reads, writes, and configures the VMS110 via a 5-bit address field that is decoded by the VMS110 state machine and decoding logic. The VMS110 is memory mapped into the address space. The address command set includes reading the status, writing mode registers, loading cryptographic keys, and loading and unloading plain and cipher data.

The VMS110 also has a key cache which consists of four 56-bit write-only registers which allow for high-speed key context switching. This multi-key cache will facilitate single DES operations and can support triple DES in future designs. The VMS110 also includes VLSI Technology's digital non-deterministic randomizer (patent pending) for Initialization Vector (IV), key generation, and random number seeding. The randomizer generates random bits at greater than 1 Mbit/second.