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ARM Cache Simulation Advances Embedded ASIC Design Goals; Big Gain Towards the One-Chip Embedded Application
Business Wire, Sept 12, 1995
SAN JOSE, Calif.--(BUSINESS WIRE)--Sept. 12, 1995--VLSI Technology, Inc. (NASDAQ:VLSI) has begun beta testing a new cache memory simulation tool supporting its embedded ARM RISC-based ASIC products.
The CacheSim(TM) development tool plugs into the VLSI JumpStart(TM) software development environment and gives the user a graphically rich, functionally powerful way to simulate performance of memory cache and peripherals integrated onto ARM-based embedded ASIC chips. This capability greatly speeds up ARM-based system design and eases integration of on-chip peripherals in ASIC-based application.
Cache is King
"As embedded CPU performance requirements continue to climb, cache memory is crucial as it allows RISC processor cores to run at full speed and eased the integration of on-chip peripherals," says Ray Slusarczyk, VLSI director of embedded product marketing. "Until now, developers have had no effective way to model and simulate cache operations under real-world conditions in the application design process.
Actively modeling and managing cache in the early stages of the development process expands the scope of application developers to optimize the integrated functions on a custom chip. We think the breakthrough capabilities of the CacheSim tool take the industry a giant step closer to one-chip embedded applications."
CacheSim Tool Features and Benefits
The CacheSim tool integrates into the VLSI Technology JumpStart(TM) ARM RISC development environment. CacheSim elements include a graphical user interface, system simulator and trace analyzer. Working within an intuitive graphical user interface, users can configure simulated on- and off-chip cache memory regions to support operations of ARM RISC cores and on-chip peripherals.
The system simulator lets users run and debug application software through simulated ASIC chips. The trace analyzer displays results of test runs and experiments conducted with the tool. Depending on the results of experiments run in the CacheSim tool, developers can optimize performance either by modifying chip architecture or changing program code.
Furthermore, users can set up memory regions that act like on-chip peripherals such as display controllers, I/O ports, serial connections, etc. This extends the tool to provide powerful virtual prototyping capabilities and a combined hardware/software embedded system design process, cutting time to market, reducing development risk and increasing probability of first-pass success when developers begin working with real hardware.
Pricing and Availability
VLSI will begin customer shipments of the CacheSim product in the fourth quarter of 1995. Single user pricing will run USD $1000 as an upgrade to existing JumpStart development environments.
About VLSI Technology, Inc.
VLSI Technology, Inc. (NASDAQ:VLSI) designs and manufactures application-specific integrated circuits (ASICs) and application-specific standard products (ASSPs) based on its library of FSB(TM) functional system blocks.
Targeting its offerings towards the communications, computing, and consumer entertainment marketplaces, the company offers its customers advanced system-level integration capabilities. The company is based in San Jose, California, with 1994 revenues of $587 million, and has approximately 2,700 employees worldwide. -0-
Note to Editors: CacheSim, FSB and JumpStart are trademarks of VLSI, Inc. All other trademarks are property of their respective companies.
CONTACT: VLSI Technology, Inc.
Martin Chorich, 408/922-5155 (Public Relations Manager)
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