Michael Kohl Joins ViewLogic as Vice President of ASIC Solutions; Ex-VLSI, Motorola ASIC Expert To Lead Viewlogic's ASIC 2000 Project

Business Wire, June 3, 1996

LAS VEGAS--(BUSINESS WIRE)--June 3, 1996--Viewlogic Systems Inc. today announced that Dr. Michael Kohl has joined the company to spearhead the newly-formed ASIC 2000 project within the company's High Level Design (HLD) Group.

The project will combine the company's best-in-class point tools and industry-leading integration technologies into comprehensive design flows that solve the problems of complex ASIC design.

Viewlogic has launched the project to address the challenges designers are faced with when by the year 2000 leading ASIC vendors are expected to introduce 0.18 micron technology, enabling system customers to design complex ASIC with more than 10 million gates on a single chip and system frequencies beyond 300 MHz. Furthermore, as core-based designs will be the standard methodology at this level, device complexity will quickly outstrip the capabilities of conventional design tools and methodologies.

"This project, and our choice of Michael to lead it, are strong statements of Viewlogic's commitment to solve the problems of complex ASIC design," said Will Herman, president and COO of Viewlogic Systems, Inc. "By any measure, we have the industry's best point technologies; we have extensive integration expertise; we're totally committed to open architectures; and we have the interfaces and relationships to prove it. By formalizing our efforts under the ASIC 2000 project, Viewlogic further establishes itself as a leader in the ASIC design space."

Separately today, Viewlogic announced a partnership with Motorola's Semiconductor Products Sector aimed at creating a next-generation design methodology that unifies the logical and physical design of deep-submicron data paths. Viewlogic also announced its intention to support the OVI/CFI Delay Calculation System -- a suite of redefined data-format and tool-interoperability standards aimed at supporting deep-submicron IC and ASIC design.

The ASIC 2000 project comprises several of Viewlogic's industry-leading point tools and their underlying technologies, including the Chronologic VCS Verilog simulator, Vantage SpeedWave VHDL simulator, FusionHDL bilingual simulator; Chronologic Verilog Model Compiler (VMC), Silerity datapath synthesis technology; and Sunrise Test TestGen test synthesis, automatic test-pattern generation and fault-simulation tools.

"ASIC complexity changes everything. Viewlogic is defining the technologies, methodologies, standards, interoperability requirements and key partnerships needed to overcome these design challenges," said Dave Burow, group vice president for Viewlogic's High Level Design Group. "Michael's past experience guiding similar projects, his outstanding relationships with ASIC vendors and third-party tool suppliers, and his clear view of what ASIC vendors' customers require, will be tremendous assets in realizing this vision."

Kohl has spent the past nine years in the ASIC industry. Most recently, he directed the development of the Design Integrator CAD System from its inception as director of design automation at VLSI Technology, Inc. Before that he was the European CMOS engineering manager at the ASIC division of Motorola, where he directed the development of the Mentor Open Architecture CAD System guided by a customer advisory board. He was also a key driver behind this Motorola/Mentor partnership. He holds a Ph.D. in electrical engineering and an MS in electrical engineering and electrophysics from the Technical University of Munich.

"Timing complex functions and ensuring signal integrity at deep-submicron geometries are critical to realizing advanced ASIC designs," said Chuck White, vice president of timing analysis at Viewlogic's Quad Design Group. "We look forward to working with Michael to realize Viewlogic's unique potential in this strategic, shifting market."

"Many EDA companies have tried and failed to support complex ASIC design because of a preoccupation with either best-in-class point tools or world-class integration. Complex ASIC design requires both," said Kohl. "With its superior point tools and integration expertise, Viewlogic is strongly positioned to create the correct environment for complex ASIC design. I'm delighted to be joining this team at such a critical stage."

The first comprehensive design flows from the ASIC 2000 project will be announced within six months.

Viewlogic Systems, Inc. (NASDAQ: VIEW) is a worldwide supplier of electronic design automation software. The company's design tools enable electrical engineers to design state-of-the-art electronic products more efficiently, while reducing both development costs and time to market. The company offers software for both Unix- and Windows-based computing platforms, along with a broad range of support services. Viewlogic is the first Computer-Aided Engineering (CAE) software company in the world to achieve registration to ISO 9001/TickIT, the most comprehensive of the ISO quality standards. For more company information, the Internet home page address for Viewlogic is http://www.viewlogic.com. Viewlogic press releases are also available through Business Wire's News on Demand fax service by calling (800) 448-8533. -0-