Motorola Expands Support of Microcontrollers That Support CAN Multiplexing Protocol; Choice of 8-, 16- and 32-Bit Devices Now Offered By Market Leader Motorola

Business Wire, Oct 1, 1997

The 68HC12 uses Motorola's modular design methodology which allows specialized functional modules to connect to the on-chip bus interface, the Lite Module Bus (LMB), which has been optimized for low power consumption. This LMB bus interface allows Motorola to re-use proven peripheral modules for new customer- and market-specific MCUs.

The Motorola Scalable CAN concept was used to migrate from the msCAN08 module found on the 8-bit 68HC08 MCU family to an enhanced, more powerful module for the 68HC12 family. Compared with the msCAN08, the msCAN12 module features doubled message acceptance filtering capability, with 8-8 bit, 4-16 bit or 2-32 bit filter configurations.

It also implements the CAN 2.0 specification Part A with 11-bit identifiers and Part B with 29-bit identifiers and supports bus speeds up to the maximum of 1Mbit/second. The msCAN12 has the same data interface as the msCAN08, including receive and transmit buffers.

68HC912BC32 Features

-- Motorola Scaleable CAN (msCAN12) Controller implementing CAN 2.0B

protocol -- 32 Kbytes of flash EEPROM -- 768 bytes of byte-erasable EEPROM -- One Kbyte of SRAM -- 8-channel, 8-bit Analog-to-Digital (A/D) Converter -- 8-channel, 16-bit timer that allows a flexible choice for clock

input -- Four-channel, 8-bit or two-channel 16-bit Pulse Width Modulator

(PWM) with center-aligned options -- SPI, SCI -- Up to 64 I/O pins -- 8 MHz internal bus frequency -- 80-pin QFP package (pin compatible with the 68HC912B32)

68HC912D60 Features

-- Motorola Scaleable CAN (msCAN12) Controller implementing CAN 2.0B

protocol -- 60 Kbytes of flash EEPROM -- Two Kbytes of byte-erasable EEPROM -- Two Kbytes of SRAM -- Two 8-channel, 10-bit Analog-to-Digital (A/D) Converters -- 8-channel, 16-bit Enhanced Capture Timer -- Four-channel, 8-bit PWM with center aligned options -- Phase Locked Loop (PLL) clock generation module -- SPI, two SCI -- Up to 80 I/O pins -- 8 MHz internal bus frequency -- 112-pin TQFP package

In addition to the features listed above, both the 68HC912BC32 and 68HC912D60 also include:

-- Lite Integration Module (LIM) with non-intrusive Background Debug

Mode, multiplexed bus, watchdog timer, clock monitor and

periodic interrupt timer -- Wait and Stop modes for reduced power consumption -- Operating temperatures from -40 Celsius up to 125 Celsius -0- NOTE: Background Debug and OSEK-OS are trademarks of Motorola Inc. Background Debug is a trademark of Motorola Inc.

CONTACT: Motorola Inc., East Kilbride, Scotland, U.K.

Stephen Lynas, 44 (1355) 56 5480 (editorial contact)

Motorola Inc., Austin, Texas

Judy Racino, 512/891-3465 (editorial contact)

or

Motorola MCU Information (Reader contact/inquiry response)

P.O. Box 13026

Austin, TX 78711

800/765-7795, ext. 612

512/328-2268, ext. 612

www.mcu.motsps.com