IP Semiconductors Set New Performance Standard with First Full Duplex 2.5 Gb/s Network Processor in Xilinx FPGAs

Business Wire, August 13, 2001

Business Editors/High Tech Writers

COPENHAGEN, Denmark--(BUSINESS WIRE)--August 13, 2001

IP Semiconductors (IPS) today set a new performance standard with the introduction of the SPEEDRouter(TM), the industry's first full duplex 2.5 Gb/s network processor.

The Xilinx Virtex-II FPGA-based network processor core is targeted at mainstream vendors of revenue-generating, high-speed routers in Wide Area Networks (WANs).

The SPEEDRouter(TM) defines a new level of packet processing performance, offering up to 5 times the performance of alternative solutions. Using only 25% for the core means the remaining 75% of this FPGA is available for advanced packet processing, which not only meets OEMs' needs to differentiate their products with new, value-add features but also puts the SPEEDRouter(TM) in a performance league of its own. Furthermore, the SPEEDRouter(TM) solution reduces the total device count and power consumption by a factor of five, compared to competitive solutions.

The Need for Advanced Packet Processing Performance

The SPEEDRouter(TM) solution is targeted at the growing Edge and Access markets. The market for network processors in these segments is expected to grow to 1.384 billion USD by 2004.

"One of the main factors driving the development of the network processor market is the need of Internet Providers to generate new revenue sources, which ultimately translates into demand for advanced packet processing and classification," according to Dataquest analyst, Joseph Byrne. Up until now, however, manufacturers have not been able to meet this demand.

"The performance levels of network processors have so far fallen short of their original claims, and this has been a limiting factor in router vendors' development of revenue generating solutions," explains Bob Wheeler, senior analyst at the Linley Group.

The revolutionary performance of the SPEEDRouter(TM) however, will enable OEMs to design a new high-speed router that service providers can use to introduce revenue-generating services such as jitter-sensitive video and voice streaming applications, Voice-over-IP (VoIP), MPLS implementation, VPN routing, and IPv6 for next-generation mobile infrastructure.

Another key feature of the SPEEDRouter(TM) solution is that it reduces the power and device count by a factor of 5.

"The SPEEDRouter and SPEEDAnalyzer(TM) chip set is the first full-duplex 2.5 Gb/s solution that can perform wire-speed classification using only low-power SDRAM - unlike other solutions, it doesn't require any other external memory or CAMs," says Bob Wheeler.

Eliminating the need for these types of memories used by other network processors, enables the SPEEDRouter(TM) solution to set a new standard for low-power packet processing.

Xilinx-Based Solution

With this announcement, IP Semiconductors becomes the newest member of the Xilinx AllianceCORE(TM) 3rd-party IP provider program. IP Semiconductors' SPEEDRouter core uses Virtex FPGAs to leverage the time-to-market benefits and flexibility for interfacing to multiple, emerging network standards of Xilinx systemIO solutions. Xilinx, along with other leading networking companies is hosting the Terabit Networking Forum, an event focusing on the challenges and opportunities associated with system interface standards for the terabit era. Visit www.xilinx.com/terabit for complete program and speaker information and to register now.

"A network processor solution must be flexible enough to interface with all differing and evolving system interface standards under consideration by the industry," said Mark Bowlby, manager of the Xilinx AllianceCORE program. "The combination of the IP Semiconductors solution with Xilinx Platform FPGAs and high-speed systemIO interface cores from Xilinx provides, for the first time, a 2.5 Gbps full duplex network processor solution that can interface any standard PHY device to any switch fabric."

Pricing and Availability

The SPEEDRouter(TM) FPGA Network Processor is provided as a customizable core for the Xilinx Virtex-II and Virtex-E FPGA families. The SPEEDRouter(TM) uses the SPEEDAnalyzer(TM) lookup and classification ASSP from IPS to provide a fully customizable packet classification and billing platform to OEMs.

The SPEEDRouter(TM) FPGA Network Processor core and its Evaluation Kit are now shipping for the Virtex-II and Virtex-E families. The SPEEDRouter(TM) FPGA Network Processor solution license is priced on a per-project basis, with the royalty tied to volume shipment of SPEEDAnalyzer(TM) devices. The SPEEDRouter(TM) Evaluation Kit is priced at 3,500 USD. An accompanying SPEEDRouter(TM) Rapid Prototyping Board is priced at 14,500 USD.

About IP Semiconductors A/S

IP Semiconductors A/S is the leader in high-performance, low-power packet processing solutions. IP Semiconductors envisions a new Internet, where the QoS known from ATM, flexibility known from software and performance known from dedicated hardware will combine into a coherent solution providing new revenue generating possibilities for service providers. IP Semiconductors has partnered with Xilinx for state-of-the-art FPGA technology and Taiwan Semiconductor Manufacturing Corporation (TSMC) for chip manufacturing. Founded in 1998, IP Semiconductors is a privately held company owned by pension funds, venture capital funds and private investors. The main office is located in Soeborg on the outskirts of Copenhagen in Denmark.