Improv Systems Releases New Version of Acappella Platform Optimized for Voice-Over-PacketCable

Business Wire, March 19, 2001

Business Editors/High-Tech Writers

BEVERLY, Mass.--(BUSINESS WIRE)--March 19, 2001

Jazz(TM) Configurable DSP core available as part of complete

hardware/software solution tuned for PacketCable specifications

Improv Systems(TM) Inc., a pioneer in configurable DSP processors for communications and media, today announced a new addition to its Acappella family of hardware/software solutions for voice-over packet (VoP) applications. Acappella-VOPC offers designers of Voice-Over-PacketCable products a complete suite of hardware and software elements specifically optimized for meeting PacketCable key specifications.

Acappella-VOPC is based around Improv's configurable DSP VLIW core, the Jazz Processor(TM). For this release, the Jazz core is pre-configured for efficient execution of the voice coding algorithms needed in VOPC, including G.728, G.728I, G. 729E, and G.168 echo cancellation. It offers a 32-bit datapath, two ALUs, two MACs, two shifters, one control unit and two memory slots.

The solution also comes with a pre-configured Host Bus Interface that supports major embedded processors; a Time Slot Interchange to telephone SLIC/SLACs; and a specifically designed software suite for PacketCable. The hardware components of the solution are delivered as fully synthesizeable Verilog RTL code.

"With our initial release of the Acappella solution last fall we demonstrated our ability to take the general capabilities of configurable platforms, and add critical application specificity for specialized markets, in this case VoP and broadband applications. Acappella-VOPC takes that approach to the next level by focusing on the unique requirements of PacketCable," said Bob Bell, Director of applications marketing at Improv. "The combination of configurable hardware elements and a robust software suite that supports things such as voice codecs, echo cancellation and tones, gives designers a comprehensive, high-performance and flexible approach to developing products in this space."

As with all Improv's offerings, Acappella-VOPC comes with a robust development environment. The platform is constructed using Improv's innovative Jazz PSA Composer(TM) tool that allows graphical configuration of custom VLIW processors, multiple processors and embedded memories. All the Acappella software is written in Improv's Notation Environment using a structured form of Java and no assembly programming is required.

The Acappella-VOPC solution is a single processor implementation of the Improv platform designed using Synopsys' tool set. It acts as a complete, integrated subsystem that can be incorporated into an existing cable network terminal. Among the features it offers is very small die size and low power consumption and it serves as a platform for a single chip implementation.

Support for Synopsys' tool set

The Jazz PSA Implementation Kit includes deliverables that function in a standard ASIC methodology using Synopsys' design tool flow including:

--  VCS(TM) for high-performance Verilog simulation
--  CoverMeter(TM) for evaluating Verilog code coverage
--  Design Compiler Ultra(TM), Synopsys' flagship synthesis product
--  DFT Compiler for scan insertion
--  PrimeTime(R) for -full chip, static timing analysis
--  PrimePower for ASIC power analysis and verification
--  TetraMAX(R) for advanced automatic test pattern generation

High-Quality Deliverables are Reusable

The Acappella-VOPC's Jazz core offers extremely high levels of reuse quality. It received a four-star rating from the OpenMORE assessment program. That program is designed to enable a self-assessment of the reusability of commercial IP offerings. The OpenMORE assessment program focuses on the design, verification and delivery of IP and is based on the Reuse Methodology Manual (RMM) Second Edition, coauthored by Mentor Graphics and Synopsys. The OpenMORE assessment program can be downloaded free of charge at www.openmore.com.

"We are pleased to have Improv as a member of Synopsys' IP Catalyst Program," said Laura Horsey, manager of IP Partnerships at Synopsys, Inc. "The four-star rating the Jazz core received from the OpenMORE assessment program indicates the reuse quality that Improv's customers can expect from this core. The completed OpenMORE assessment will provide their customers a window into the engineering practices that determine the Jazz core's reusability."

About Improv Systems, Inc.

Improv Systems(TM), Inc. develops and licenses configurable processors and platform solutions for Voice-over-IP, Networking and Emerging Media. Improv's Jazz DSP is a programmable, scaleable, and configurable DSP, targeted to consumer electronics and telecommunications markets. Improv's solution extends beyond the hardware; it includes a complete tool suite to facilitate rapid, system level design and state-of-the-art compilation technology to efficiently map applications onto its Jazz DSP solution. In addition, Improv offers pre-designed applications platforms for a complete solution and software components to jump start product development efforts. Improv Systems has development centers in Beverly, MA, Santa Clara, CA, and Rochester, NY, and direct sales offices in Paris and Tokyo. Improv is headquartered in Beverly, MA (01915) at 100 Cummings Center Suite 343G and can be reached at 978/927-0555 or at http://www.improvsys.com.