NEC Electronics Selects Synplicity for Custom ASIC Synthesis Development; Synplicity to Deliver Custom Software to Enable Optimized Results for NEC's ISSP Products

Business Wire, March 4, 2003

Business Editors/High-Tech Writers

DATE CONFERENCE

MUNICH, Germany--(BUSINESS WIRE)--March 4, 2003

Synplicity Inc. (Nasdaq:SYNP), a leading supplier of software for the design and verification of semiconductors, today announced it has signed a joint development agreement with NEC Electronics Corporation to provide support for NEC's Instant Silicon Solution Platform (ISSP) ASIC devices. Under terms of the agreement, Synplicity will develop custom synthesis mapping technology for its Synplify ASIC(R) software, optimized to deliver the best performance, density and design productivity for the ISSP devices. NEC Electronics has provided Synplicity with detailed information about its ISSP architecture, has validated the Synplify ASIC software's performance and will integrate the software into its overall OpenCAD design flow. NEC Electronics and its subsidiaries in North America and Europe will offer library support for the custom Synplify ASIC software to its ISSP customers worldwide to enable high-performance, high design capacity and fast turnaround times.

"We chose to work with Synplicity due to its synthesis expertise and history of success in developing custom mapping technology for the high-end FPGA market, and have found Synplicity to be a valuable and responsive development partner," said Dr. Hitoshi Yoshizawa, general manager, 3rd custom LSI division, NEC Electronics Corporation. "With a custom mapper optimized for our ISSP architecture, we expect our customers will be able to use the Synplify ASIC software to obtain the best timing performance possible. Likewise, we have found the Synplify ASIC software to be very easy to use not only by ASIC designers but also by system designers -- a critical characteristic for tools in a high-productivity design flow -- enabling our customers to realize the fast time-to-market benefits provided by our ISSP devices."

Ken McElvain, chief technical officer at Synplicity, said, "In order to realize the performance and time-to-market advantages offered by NEC's easy-to-design silicon platform, designers must have access to automated, easy-to-use design tools. Synplicity has consistently provided high-productivity, high-performance synthesis solutions, and the ISSP architecture is an ideal platform to apply our core synthesis and mapping capabilities. We teamed closely with NEC to understand the details of the unique ISSP architecture and develop a synthesis engine that would maximize the performance, density and time-to-market advantages offered by the devices."

As part of this joint agreement, both parties intend to continue to optimize the Synplify ASIC software for the ISSP architecture. Synplicity also intends to train and work closely with NEC's field design centers in order to provide its mutual customers complete support. With the initial development complete, Synplicity and NEC Electronics expect customers will immediately realize timing performance, area and runtime advantages over synthesis solutions that are not optimized for the ISSP devices. Synplicity intends to develop future releases of the Synplify ASIC software in conjunction with NEC Electronics to integrate the latest design software and architectural enhancements to the ISSP solution. Both companies will work with customers using ISSP devices to define additional design flow advantages.

Pricing and Availability

The Synplify ASIC software version 2.4.1 with the ISSP-specific mapping technology is available from Synplicity now. A one-year time-based license starts at $45,000 (U.S.), and a perpetual license starts at $115,000 (U.S.). Customers on maintenance will be upgraded for free. The software is available for Linux (Red Hat 8.0), HP-UX 11.11, Sun Solaris 2.7/2.8/2.9, Windows NT 4.0 and Windows 2000 operating systems.

About Synplicity's ASIC Synthesis Solution

Introduced in June 2001, Synplicity's Synplify ASIC software leverages the company's proven synthesis technology, delivers high quality of results and features order of magnitude runtime improvements over traditional synthesis products. The Synplify ASIC software has been production proven through customer tapeout successes and endorsements from leading ASIC vendors, and has been flow tested with leading EDA tools. This solution offers a unique top-down design methodology that enables designers to perform timing-driven synthesis on up to two million gates in a single block, supporting matching hierarchy and constraints in both synthesis and place-and-route steps. Additionally, the Synplify ASIC software offers a unique MultiPoint(TM) design flow for fast, high-performance hierarchical synthesis for any size of ASIC. The Synplify ASIC software is the only ASIC synthesis solution to provide performance-optimized synthesis capability for the ISSP architecture from NEC Electronics.

About the Instant Silicon Solution Platform Devices

NEC Electronics' ISSP is a new class of ASIC device based on a cost-effective, high-function, easy-to-design ASIC architecture. Targeting mid-volume designs, ISSPs combine the high performance found in leading-edge cell-based ASICs with a remarkably easy design flow. ISSP devices are easily customizable using upper metal layers to meet individual design requirements. An ISSP is ideal for mid-volume designers engaged in complex designs with high system clock speeds. However, the platforms are generally very easy to design, consume much lower power than a comparable FPGA-based solution, and offer up to an order of magnitude lower NRE costs than cell-based designs. NEC offers a breadth of ASIC solutions using cell-based and gate array products. An ISSP complements these approaches by serving the growing number of mid-volume applications that cannot bear the development costs associated with leading-edge cell-based designs but which require higher complexity than a gate array or FPGA solution.