Fifth Generation PortalPlayer SoC Triples MP3 Player Battery Life

Business Wire, March 3, 2005

SANTA CLARA, Calif. -- Parallel Processing Architecture Dramatically Reduces Clock Rates During Typical Operation While Delivering High on-Demand Peak Performance

PortalPlayer, Inc. (Nasdaq:PLAY), a leading supplier of advanced system-on-chip, firmware and software solutions for the MP3 personal media player market, today announced its next-generation PP5022 System-on-Chip (SoC). The PP5022 is designed to meet next generation requirements for feature-rich hard-disk drive-based personal media players.

The PP5022 is the fifth generation personal media player integrated circuit from PortalPlayer. With a range of architectural improvements from the previous PP5020, the new chip, starting to ship now, offers more than a three times reduction in SoC power consumption and enabling up to triple the battery life. PortalPlayer's innovative parallel processing architecture combined with optimized firmware allows for lower clock rates and core voltages, leading to dramatically lower SoC power levels versus a comparable uniprocessor system. Decoding a typical 160 kilobits per second (Kbps) MP3 stream now requires less than 25mW.

"The PP5022 chip is a very sophisticated product that enables a rich user experience with substantially longer playback time," said Will Strauss, president of Forward Concepts, a research firm covering the electronics market. "PortalPlayer is continuing to bring new innovations to the audio market such as a tripling battery life for MP3 players, integrating USB 2.0 Host Controller and Transceiver into the media processor and providing transparent compatibility with peripheral devices such as digital still cameras and printers."

"Our goal with the PP5022 was to offer a solution that balances lowest operating power while continuing to increase system performance," said Michael Maia, vice president of sales and marketing at PortalPlayer. "We achieved this goal and will continue to deliver the lowest operational power during playback and encoding of rich media content--the PP5022 is our most innovative SoC to date, resulting in best-in-class battery life in hard drive jukebox systems."

PortalPlayer PP5022 System-on-Chip

Power - Power consumption of the system was markedly reduced by using a 0.13 micron CMOS process with 1.0 to 1.2V core power, dynamic load balancing, clock gating, and support for 1.8V Low Voltage synchronous DRAM. Efficient parallel processing reduces the required clock rates driving typical operation down and further enabling lower voltage operation. Together with pseudo synchronous blocks within the device that improves clock distribution by dynamically turning off inactive modules on a per clock cycle basis, these improvements lead to dramatic power reductions. The PortalPlayer Firmware Development Kit (FDK) will support these features as well as highly optimized split decoders to further lower clock rates on MP3, AAC and WMA decodes. Dynamic Voltage Scaling (DVS) is supported enabling the device to operate over a wide voltage range to match needed performance to the specific task.

Performance - The PP5022 features a highly parallel media processing architecture that integrates dual 32-bit ARM7 central processing units (CPUs) with zero wait state four-port 128 kilobytes iRAM and six direct memory access (DMA) channels connected through multiple high-speed internal buses. The PortalPlayer SoC maximizes total processing throughput per clock cycle, which leads to lower clock rates in standard operation than a comparable ARM9-based SoC. Additionally, having multiple internal buses provides higher data throughput, while avoiding the performance bottlenecks of competing systems. The PP5022 architecture enables a high on-demand peak performance without sacrificing ultra low power for mobile devices in standard operation than comparative DSP, VLIW, SIMD, or single RISC microprocessor solutions.

The high performance media processor engine design supports up to sixteen concurrent tasks for maximizing system throughput and responsiveness to end-user commands. Dedicated high-performance interfaces reduce latencies and improve download speeds and performance of database engines when a large number of music files and photos are being managed.

System Input/Outputs - The PP5022 is offered in a 261-pin 12mm x12mm TFBGA package, providing added flexibility through a wide selection of fully integrated high performance system input/outputs including: the analog physical layer and USB 2.0 controller for high-speed Device, Host and On-the-Go support; FireWire Link Layer integration; dedicated ATA-66 enhanced IDE bus supporting up to four devices; 4-bit SDMMC controller; consumer CD I2S port; 8/16-bit expansion IO; B/SIR infrared; TWC 3-wire controller; 4 channel, 8-bit ADC; 4 channel, 8-bit PWM/FM; up to 48 GPIOs; dedicated 16-bit memory controller for two banks of 2.5V or 1.8V SDRAM; and digital video input for direct connection of image sensors or mobile video services such as DVB-H.

Display - The PP5022 display subsystem meets the demands of today's diverse display technologies in personal media players ranging from mobile high-resolution TFT and STN flat panels to NTSC and PAL TVs. The "Dual View" display enables navigating the handheld players' LCD to preview and select music, photos and video while playing a different image concurrently on the TV. Display support includes: 8-bit parallel bridge interface; 4-bpp mono serial or parallel controller for direct interface panels; 18-bpp color TFT or CSTN controller; CCIR-601/656 TV out; hardware color space conversion and 4-bpp hardware overlay support.