Virage Logic DAC Program Features Advanced IP Solutions for 45nm & 65nm, Low Power, DFY/DFM and Yield Acceleration

Business Wire, May 24, 2007

The Semiconductor Industry's Trusted IP Partner Showcases VIP Partners, Executive Business Sessions and Technical Tracks at DAC

FREMONT, Calif. -- Virage Logic Corporation (Nasdaq: VIRL), the semiconductor industry's trusted IP partner and pioneer in Silicon Aware IP[TM], today announced it will feature an extensive program at the 44th Design Automation Conference (DAC), to be held June 4-7, 2007, at the San Diego Convention Center in San Diego, California. Virage Logic will be hosting booth #5578 in the San Diego Convention Center, Hall E.

As the industry's trusted IP partner, Virage Logic's highly differentiated IP portfolio offers solutions for 65nm and 45nm design challenges, low power design, Design-for-Yield/Design-for-Manufacturing (DFY/DFM) optimization, yield acceleration, Digital Rights Management (DRM), Radio Frequency Identification (RFID) and security. This broad IP technology offering will be showcased by Virage Logic at DAC to help attendees learn how they can proceed with confidence using IP solutions that address their system-on-chip (SoC) design challenges.

Book an executive business session or a technical track with the Virage Logic IP experts at DAC to learn more about the company's silicon proven advanced technology.

Executive Sessions:

* Maximized Differentiation for Competitiveness and Profitability

* Raising the Bar on Silicon Validation - Addressing Advanced Process Node Challenges

* DFM/DFY - How New Test Technologies Address Yield Optimization Issues

Technical Tracks:

* Advanced Process Node Technologies - 65nm-45nm SRAM & Logic Offerings

* Advanced Low-Power Techniques: Maximizing Density While Minimizing Power

* Accelerate Time-to-Market with Cost-Effective Metal Programmable Logic

* Advanced Test for Embedded SRAM

* Memory Yield Acceleration

* Addressing Digital Rights Management, RFID and Security Challenges

With the support of the leading Electronic Design Automation (EDA) companies, Virage Logic's VIP Partners - Cadence Design, Magma Design Automation and Synopsys - the company will co-host the annual VIP Lounge martini bar from 5:00 p.m.-6:00 p.m. during the DAC Happy Hour in Virage Logic's booth (#5578) on Monday through Wednesday. Visitors will learn how our complementary partner solutions provide mutual customers with advanced technology to meet their design requirements for a variety of needs.

Visit the Virage Logic booth and have some fun while you learn more about the company and its technology offerings - play the IP Challenge for a chance to win an XBOX Elite 360 featuring Virage Logic IP!

For a complete listing of Virage Logic's DAC activities, VIP Partner events and presentation schedules, or to schedule a meeting with our IP experts, visit www.viragelogic.com.

Virage Logic 4th Annual Analyst Breakfast
Monday, June 4, 2007 - 7:30 a.m.-9:00 a.m.
The Hotel Solamar, 435 6th Street, San Diego, Aqua II Conference Room

Workshop for Women in EDA - Managing Your Career
Panel: Career Trajectories - The Voices of Experience
Monday, June 4, 2007 - 9:00 a.m.-1:45 p.m.
San Diego Convention Center, Room #8

Synopsys Partner Presentation - Accelerating Silicon Success with
Virage Logic Semiconductor IP and Synopsys' Galaxy(TM) Design Platform
Monday, June 4, 2007 - 2:00 p.m.-3:00 p.m.
San Diego Convention Center, Booth #3773, Suite #10

Cadence Partner Presentation - Managing Environmental Variation:
Featuring Cadence's Encounter Digital Nanometer Analysis and ECSM
Monday, June 4, 2007 - 3:00 p.m.-4:00 p.m., Virage Logic Booth #5578
Tuesday, June 5, 2007 - 9:00 a.m.-10:00 a.m., Virage Logic Booth #5578
Wednesday, June 6, 2007 - 4:00-5:00 p.m., Virage Logic Booth #5578

Virage Logic VIP Lounge Martini Bar - Co-Hosted by Cadence Design
Monday, June 4, 2007 - 5:00 p.m.-6:00 p.m.
San Diego Convention Center, Virage Logic Booth #5578

Virage Logic and TSMC After Hours Cigar Bar - Private Event
Monday, June 4, 2007 - 9:30 p.m.-midnight
The Hotel Solamar, 435 6th Street, San Diego, Jbar Pool Deck

DAC Panel Session 7:
DFM and the Manufacturing Interface - Making Manufacturing Work for
You
Tuesday, June 5, 2007 - 2:00 p.m.-4:00 p.m.
San Diego Convention Center, Room #6C

Unified Power Format (UPF) Presentation
Virage Logic - The Semiconductor Industry's Trusted IP Partner for Low
Power
Tuesday, June 5, 2007 - 2:00 p.m.-3:00 p.m., UPF Booth #7860
Wednesday, June 6, 2007 - Noon-1:00 p.m. - UPF Booth #7860

Virage Logic VIP Lounge Martini Bar - Co-Hosted by Magma Design
Automation
Tuesday, June 5, 2007 - 5:00 p.m.-6:00 p.m.
San Diego Convention Center, Virage Logic Booth #5578

Virage Logic UMC Booth Presentation and Apple iPod Drawing
Wednesday, June 6, 2007 - 1:30 p.m.-6:00 p.m.
San Diego Convention Center, UMC Booth #4074

Virage Logic VIP Lounge Martini Bar - Co-Hosted by Synopsys
Wednesday, June 6, 2007 - 5:00 p.m.-6:00 p.m.
San Diego Convention Center, Virage Logic Booth #5578

About Virage Logic Corporation

Founded in 1996, Virage Logic Corporation (Nasdaq: VIRL) rapidly established itself as a technology and market leader in providing advanced embedded memory intellectual property (IP) for the design of complex integrated circuits. Today, as the semiconductor industry's trusted IP partner, the company is a global leader n IP platforms comprising embedded memories, logic, and I/Os, and is pioneering the development of a new class of IP called Silicon Aware IP(TM). Silicon Aware IP tightly integrates Physical IP (memory, logic and I/Os) with the embedded test, diagnostic, and repair capabilities of Infrastructure IP to help ensure manufacturability and optimized yield at the advanced process nodes. Virage Logic's highly differentiated product portfolio provides higher performance, lower power, higher density and optimal yield to foundries, integrated device manufacturers (IDMs) and fabless customers who develop products for the consumer, communications and networking, hand-held and portable, and computer and graphics markets. The company uses its FirstPass-Silicon(TM) Characterization Lab for certain products to help ensure high quality, reliable IP across a wide range of foundries and process technologies. The company also prides itself on providing superior customer support and was named the 2006 Customer Service Leader of the Year in the Semiconductor IP Market by Frost & Sullivan. Headquartered in Fremont, California, Virage Logic has R&D, sales and support offices worldwide. For more information, visit www.viragelogic.com.