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Keithley ACS Version 3.2 Offers New Parallel Test and Parametric Die Sort Features for Higher Throughput

Business Wire, Jan 10, 2008

CLEVELAND -- Keithley Instruments, Inc. (NYSE:KEI), a leader in solutions for emerging measurement needs, announces the availability of ACS (Automated Characterization Suite) V3.2 software for semiconductor test and characterization at the device, wafer, and cassette level. Version 3.2 further enhances the powerful automation capabilities of ACS integrated test systems by adding more powerful multi-site parallel test capabilities, results binning for die sort applications, new wafer level plotting capabilities, and support for Keithley's new Models 2635 and 2636 System SourceMeter([R]) instruments with 1fA current measurement resolution. These new capabilities supply the most cost effective combination available for high levels of test flexibility and throughput - including unattended operation in both lab and production settings. To learn more about Keithley's ACS integrated test systems, visit http://www.keithley.com/pr/070.> Greater Flexibility and Throughput. New semiconductor technologies demand more testing and data collection with less time and fewer resources. The most cost effective and flexible test platform to meet these needs continues to be one based on source-measure units (SMUs), driven by a software package that does not require in-house or third party development of a fab's unique measurement applications. Keithley's Automated Characterization Suite, V3.2, meets these needs with a uniform software package containing ready to run applications for its Model 4200-SCS, Series 2600 System SourceMeter instruments, and other SMU-based systems. The result is reduced time to market and lower overall cost of test.

Multi-site Testing. Integrated results binning from multi-site testing requires special features to manage the test flow, from wafer mapping all the way through to output binning files. ACS V3.2 allows automation at the wafer or cassette level and thereby enables more unattended testing and collection of large statistical data samples for modeling and process qualification, as well as maximizing tool utilization. ACS defines logical and physical sites in a way that allows parallel testing of structures and devices. Test results are correlated to logical sites through the test execution flow. Parallel test execution selection literally requires only a few clicks of the mouse to move from a sequential test to a true parallel test operation.

The enabling technology is Keithley's TSP-Link[TM] that's embedded in its Series 2600 System SourceMeter instruments. Wafer level plotting allows users to easily navigate through a cassette of wafers, viewing each wafer's multi-color binning plot. Users only need to click on the logical sites being reviewed, and results are immediately plotted with the analysis parameters applied during test development.

Die Sort Applications. ACS can handle as many as 100,000 die per wafer - a highly valuable feature in die sorting. Its wafer description utility supports graphical zoom functions to facilitate high die count wafer setups. To further accelerate die sort speeds, ACS supports programmable exit conditions so that when a test indicates a substandard device, the remainder of the tests can be skipped. The probing sequence can be optimized with either test pattern or physical site priority to maximize both prober and test hardware utilization. New larger parametric test libraries for both the Series 2600 and Model 4200-SCS reduces test setup time, and the User Access Points (UAPs) let users extend the features and functions of the Keithley-provided test execution engine, which includes generation of binning files.

Extended Support. ACS now includes support for the new line of Series 2600 System SourceMeter units with increased current sensitivity. This includes both the single channel Model 2635 and dual channel Model 2636, which provide current measurement resolution down to 1fA and source voltages as high as 200V. Series 2600 System SourceMeter instruments are ideal for a broad range of semiconductor reliability testing, including the challenges of scaled silicon reliability tests like NBTI (negative bias temperature instability.) ACS also supports real time plotting of test results; providing visibility into reliability tests such as TDDB, NBTI, HCI, etc.

Summary of New Features:

* Logical and physical sites supports multi site parallel testing

* Supports up to 100,000 die per wafer

* Site or Pattern priority sequence optimization

* Selectable exit conditions at the device, subsite, site, wafer, and project level

* User Access Points (UAPs) let users extend the features and functions of the Keithley-provided test execution engine

* Cassette sample plan

* Priority binning with up to 16 bins

* Logical site binning to support multi-site parallel test

* Wafer level plot brings together graphical data analysis and wafer level navigation - click on a logical site to view graphical analysis of selected test

* Real time plotting of test results and analysis

* New larger parametric and reliability libraries