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Full Day, Hands-On Bluespec Tutorial Collocated with DAC
Business Wire, May 13, 2008
Introduction to Bluespec SystemVerilog on Saturday June 7, 2008
WALTHAM, Mass. -- Bluespec Inc.:
WHAT: A full day tutorial entitled: "Hands-on Introduction to BSV (Bluespec SystemVerilog)"
WHEN: Saturday, June 7, 2008 from 9:00A to 5:00P PDT
WHERE: The tutorial will be given at MEMOCODE '08, which is being held at the Anaheim Convention Center in room 303B, in Anaheim, CA. MEMOCODE is collocated with DAC.
WHO: The tutorial will be presented by Arvind and Rishiyur Nikhil, with support from several MIT students. Arvind is the Johnson Professor of Computer Science and Engineering, Massachusetts Institute of Technology (MIT), co-originator (along with James Hoe) of the synthesis technology underlying BSV, and a co-founder of Bluespec, Inc. Rishiyur Nikhil is the CTO and a co-founder of Bluespec, Inc. Several MIT students who are Bluespec experts will also be present to assist participants with the lab work.
Tutorial Details:
In this tutorial participants will get a solid technical introduction to BSV and learn how it improves many aspects of modern SoC development: modeling, early software development, architecture exploration, design, verification, and long-term evolution and maintenance. The lectures will be organized around a few serious examples and will examine and analyze excerpts of their actual source code. The tutorial is also hands-on for those who bring their laptops and wish to work with the tools. Tutorial and MEMOCODE conference registration and details can be found on the conference website at http://svl1.cs.pdx.edu/memocode08/. For those interested in attending just the tutorial, the cost ranges from $50 to $125 depending on affiliation.
BSV is a modern, fully synthesizable design language in which all behavior is expressed with Guarded Atomic Actions (rewrite rules, concurrent atomic transactions). Rules can systematically be composed from fragments across module boundaries using atomic transactional interfaces. In addition, BSV has powerful abstraction mechanisms such as expressive and polymorphic types with overloading and strong static type-checking, full orthogonality (all types are first-class), and Turing-complete static elaboration. Thus, BSV is scalable to large, industrial-strength System-on-Chips (SoCs) even while designs remain highly parameterized and succinct.
Contact George Harper, Bluespec's vice president of marketing, for more details. He can be reached at (781) 250-2200 or via email at george.harper@bluespec.com.
About Bluespec
Bluespec Inc. manufactures an industry standards-based Electronic Design Automation (EDA) toolset that significantly raises the level of abstraction for hardware design while retaining the ability to automatically synthesize high-quality RTL, without compromising speed, power or area. Elevating System-on-Chip (SoC) modeling, verification and implementation with atomic transactions, the only high-level abstraction for hardware concurrency, the general purpose toolset allows ASIC and FPGA teams to reduce development time, bugs and re-spins that contribute to product delays and escalating costs. More information can be found on www.bluespec.com or by calling (781) 250-2200.
Copyright 2008 Bluespec Inc. Bluespec and AzureIP are trademarks of Bluespec Inc. All other brands, products or service names may be trademarks or service marks of the companies with which they are associated.
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