Synopsys Taking Hold of Library Biz

Electronic News, March 20, 2000 by Gale Morrison

New York--Synopsys Inc. will come charging into the IP2000 conference in Santa Clara this week with a Microsoft-like prod to the semiconductor intellectual property (SIP) and back-end electronic design automation (EDA) business.

The Mountain View, Calif., EDA giant is coming at the SIP and physical library business fully armed by putting what was two divisions--Silicon Architects and Design Reuse--behind the single goal of getting a greatly expanded "DesignWare" offering on every chip designer's desktop.

Synopsys' DesignWare has several complex commodity cores, including MPEG2, evolving to MPEG4, USB 2.0, and the ubiquitous Motorola 8051 controller (integral to every client in the Bluetooth wireless network scheme). DesignWare will have beefed-up CoreBuilder and CoreConsultant software, too, which properly package and automate the industry-wide evolution to design for reuse.

The firm already sells twice as much commodity SIP as the No. 2 vendor, inSilicon Inc., which just filed for an initial public offering, said Phil Dworsky, director of marketing in the new Design Reuse group at Synopsys. The business has been growing at 64 percent annually over the last three years and Synopsys wants that to continue.

"This is not a one-time injection of SIP for customers, this is a pipeline," said Dworsky. "We're serious about memory libraries, too. This is not a toy library. This is a complete offering," he said.

And Synopsys will offer the physical libraries for at least a half-dozen sub-0.25-micron fab processes around the industry. Physical libraries feed the data on a specific fab process into the chip design flow, so engineers get the physical particulars of the transistors and gates they lay out. The libraries come in a few formats, depending on which EDA vendor tools were used to come up with them. Two of the most prevalent "views" are in the ".lib" format from the Synopsys flow, and ".lef" from the Cadence Design Systems Inc. flow.

The sheer marketing muscle of Synopsys is evident here. DesignWare costs $16,200 per year, per seat, and it is sold as an option on most Synopsys sales calls. Fifteen thousand designers already have the software on their desktop, Dworksy said.

Synopsys' jump into standard cell libraries, which is the entire business of firms like Artisan Components Inc. and Virtual Silicon Technology Inc. (VST), will start with Taiwan Semiconductor Manufacturing Co. Ltd.'s (TSMC) leading-edge 0.15-micron process (announced this week with Altera Inc.).

Before the Design Automation Conference in June, a major European IDM's high-end process will be added. Top tier ASIC vendor NEC Inc., Tokyo, uses DesignWare, so physical libraries for its latest processes are a prime candidate. That Synopsys will proliferate the ASIC and IDM libraries even changes the entire world fab capacity game, adding to the management job of Taiwan's foundries as two Malaysian foundries continue to ramp and a dark cloud of political uncertainty with mainland China hangs overhead.

TSMC works with seven vendors to provide customers with its physical libraries: Artisan, Avant!, NurLogic, Synopsys, Virage, Virtual Silicon Technology, Xemics, said Kurt Wolf, director of marketing for TSMC's library program. His job, he said, is to "let the market and the customers decide" what's the best channel for TSMC libraries. But the channel that DesignWare adds is significant, for sure.

"With the Synopsys channel, there's a lot of visibility," said Wolf. "They distribute DesignWare with all of their front-end tools." (Synopsys is the de facto standard in register transfer level synthesis; company revenues are set to be $1 billion this year.)

"It's already there on the guy's desktop. It doesn't come free, but it's an option on another purchase. (Getting DesignWare while purchasing Synopsys' flagship DesignCompiler or new PhysicalCompiler tools) is like the part of when you buy a car and they ask, you know, do you want two cup holders or just one?" Wolf joked. TSMC ensures that this proliferation doesn't go too far --and competitors get proprietary process information--by holding back from DesignWare certain files that comprise the final manufacturing directives. DesignWare users don't just license these files with a "click and accept" software dialog, but rather a stricter agreement with TSMC. Still though, those files don't cost any more.

Wolf said TSMC will explain this week why running such library programs and interfacing with EDA overall is becoming a priority for the world's largest foundry. "We're going to talk about our overall proficiency, what programs we have in place to make sure a customer has access to whatever kind of expertise he needs," he said. "We're never going to be an ASIC house. But we will have 'proficiency' for whatever kind of customer walks in the door."

The Fallout

What does this move by Synopsys portend for other library vendors? Mentor Graphics Corp. pulled up stakes from the physical library business in December with the sale of those assets to Virage Logic Inc., Sunnyvale, Calif. Virtual Silicon Technology thinks this large EDA company can't do it either.