NEC readying midvolume play: Gate array and ASIC company crafts offering in between the two - Semiconductors

Electronic News, March 18, 2002 by Gale Morrison

Looking to address the demand for lower nonrecurring engineering (NRE) costs and faster turnaround than ASICs can provide--but with greater performance and density than FPGAs can deliver--NEC Corp. today will introduce what it calls the Instant Silicon Solution Platforms (ISSPs).

The introduction is another indicator in a long list accumulating aver the last six months that NRE, and particularly photomask, costs are turning into much more than a thorn in the side of QEMs. NRE may actually be scuttling deals for semiconductor makers. If that's the case, and it seems to be, IC vendors will scramble to offer more options.

"There is a growing market segment out there where FPGAs are running out of steam, but cell-based design times and cost are prohibitive," said Kyuichi Hareyama, general manager of the second system LSI division of NEC Electron Devices, the chip arm of $43 billion-a-year NEC Corp. of Tokyo.

Hareyama said the first place OEMs turn is FPGAs, particularly in the networking field where standards are evolving so fast. But FPGAs can't deliver in density and performance, he said.

Hareyama said he firmly believes that any device requiring more than a 300MHz clock frequency and a lot of intellectual property (IP), in today's market, has to go with cell-based IC. And FPGAs can't take them there. "Really, FPGAs have a difficult time meeting more than 200MHz performance," he said.

NEC is going after designs with volumes between a few thousand and 100,000 units. The company announced it plans to begin shipping the ISSPs in the third quarter of this year. The ISSPs will come off NEC's 0.13-micron UX4 process, promising up to a 75 percent reduction in turnaround time from design start to sample delivery as well as NRE costs up to 10 times lower than similar cell-based designs.

"We can take you from tape-out to shipment of engineering samples in 10 days," Hareyama promised. Customers will be supported from Tokyo as well as NEC's centers in Santa Clara, Calif., and Dusseldorf, Germany, he said.

The device architecture is a five-metal-layer design with two customizable upper layers to meet individual design requirements. The first ISSP products will include embedded SRAM and multifunction PLLs.

NEC Networks, an NEC Corp. in-house company, is using this architecture in a design for broadband optical transmission networking equipment, which will be known as the SpectraWave series, and is expecting samples by the end of the month.