STM Cuts Design Time With CoWare N2C

Electronic News, Nov 23, 1998

Tool said to enable high-level system specs and cuts design cycle by a factor of four

Santa Clara, Calif.--CoWare Inc. is announcing today that it has enabled the Programmable Products Group (PPG) of STMicroelectronics (STM) to reduce its design time by a factor of four with the CoWare N2C design system.

The CoWare N2C lets system architects capture, animate, and validate their concepts into an unambiguous system specification. Aimed at helping designers avoid unpleasant surprises at the end of the design cycle and reduce design cycle time, the tool creates a detailed system specification and tests the hardware and software against that specification throughout the design process.

"Because the complexity of systems integrated onto a single chip is growing significantly, we knew we needed to implement a new design methodology," Roberto Fantechi, R&D director of STM's PPG explained.

With the goal being to quickly optimize new architectures and develop system prototypes to make sure the products are right the first time, STM said the CoWare proved its value in giving key technology to quickly build virtual prototypes of complex system-on-a-chip designs. The virtual prototypes sped up software development process and enabled the company to bring new products to market faster.

STM is using N2C in the design of its next-generation wireless phone architecture, with the tool performing complete architectural validation, starting from a behavioral-level description, as well as hardware/software co-development of a complex design that includes STM core microprocessors.

"One of the key objectives for this project was to prove that we could reduce design time by a factor of four in the near future," stated Jean-Yves Gomez, director of STM's Wireless Business Unit, part of the PPG.

The company did not have to wait for the near future to arrive and achieved its goal with the first project, and with a much smaller design team, STM said.

New Architecture In Record Time

STM reported that CoWare enabled the PPG group to develop a new architecture in record time, and then quickly implement both the software and the hardware for the first design at the same time. Results were continually tested against high-level golden models to make sure the designs met the specifications, according to Marco Carilli, manager of the System-On-a-Chip group in PPG.

During the STM project, a link was built between CoWare N2C and STM's hardware emulation environment. Now STM can run co-simulations between CoWare RT-level C descriptions, RT-level VHDL running on the emulator and software running on an instruction set simulator, which provided increased flexibility and improvement in speed for system simulation.