Physical Design Environment Aims To Solve Deep Submicron Issues

Electronic News, March 1, 1999 by Ann Steffora

Rubicad Corp., based in San Jose, Calif., recently began shipping an integrated environment for layout design for submicron process technologies, LADEE. LADEE is an integrated, full-custom layout design and conversion tool suite to create full-custom layouts with design reuse in mind for different foundries, applications and fabs.

LADEE addresses signal integrity problems like crosstalk and optimizes layouts for performance and power. It includes modules for layout entry (LACEedit), extraction, verification, compaction and hierarchical conversion (LACE). The company is targeting LADEE at the general IC layout market, based on its experience with 0.18-micron technology that has shown tight wire capacitance control is needed to increase the performance. LADEE offers crosstalk analysis and considers the results of the analysis during the automatic design conversion process along with circuit timing analysis to achieve speed and power consumption requirements. For this, LADEE provides active control over the interconnect capacitance created during the physical design process and recognizes and resolves sophisticated deep submicron design rules, which are highly conditional for specific layout structures in 0.25-micron technologies and below. If post-layout verification and simulation results show timing and electrical problems, it is necessary to modify the layout only around the problem area without rearranging the overall topology of the physical design, the company said. Both automatically placed and routed designs and handcrafted designs need to be optimized for speed and power consumption. LADEE solves these timing and signal integrity problems automatically, it was said.