Tessera, Toshiba extend CSP pact: now looking 'face-up' and 'face-down' - News

Electronic News, June 3, 2002 by Bernard Levine

Tessera Technologies' "face-up" chip-scale packages (CSPs) got a big boost last week from Toshiba Corp., which granted Tessera the right to use and sublicense Toshiba's CSP assembly process technology to produce the face-up design.

A host of Tessera CSP licensees could gain access to the Toshiba fine-pitch BGA (FBGA) packaging technology through last week's deal. No financial details were disclosed.

A similar, earlier deal between Toshiba and Tessera covered Tessera's "face-down" CSP technology. Face-up and face-down refer to the way the semiconductor die is positioned in the CSP. Various face-up and face-down designs have been developed throughout the semiconductor packaging industry and are competing for use in CSPs, which help reduce semiconductor size in miniaturized consumer and other applications.

Tessera has licensed numerous semiconductor makers, packaging subcontractors and others to produce its CSP packages. Among them are Texas Instruments and Sharp, which took licenses to settle patent litigation disputes brought by Tessera, a San Jose-based company that has been one of the leaders in developing chip-scale technology. No other litigation involving the Tessera designs has materialized.

Last week Tessera said it signed an expanded technology licensing agreement with Toshiba that enables Tessera to act as the licensor of the Japanese company's FBGA assembly process for face-up CSPs. Utilizing Tessera's core CSP patents, these FBGA packages, also marketed by Tessera as microBGAF packages, are currently used by Toshiba in many applications, including logic, memory and multi-chip devices for computing, communications and consumer electronic products, Tessera said.

In September 2000, the companies announced a similar technology agreement enabling Tessera to utilize and sublicense Toshiba's process to assemble a wire-bonded version of Tessera's microBGA package, where the die is in a face-down orientation. Under the recently expanded agreement, Tessera is authorized to use Toshiba's assembly process for face-up CSPs and to sublicense this process to other licensees.

"This agreement results from a strong, long-term partnership between Toshiba and Tessera," said Kirk Flatow, senior VP of marketing and sales at Tessera Technologies. "It leverages Toshiba's investment in R&D and manufacturing while enhancing our ability to service existing and future licensees through delivery of Toshiba's proven manufacturing process. We are pleased that our relationship with this distinguished global leader has yielded this new agreement, and we look forward to the ongoing collaboration between our two companies."

"Tess era is unique in its ability to provide advanced packaging technology to the entire semiconductor industry," said Tsutomu Koyanagi, technology executive at Toshiba Corp.'s Semiconductor Co. "Because of the wide adoption of this technology, we have incorporated Tessera's CSP technology across our portfolio of semiconductor products. This agreement broadens the industry availability of Toshiba's manufacturing processes for these products, which enhances the market opportunities for our material and equipment vendors, and expands the number of subcontract assemblers available to Toshiba. This agreement is possible because of Toshiba's on-going close partnership with Tessera and Tessera's established commitment to proliferate advanced packaging technology throughout the semiconductor industry."