IBM Licenses MystiCom DSP-based PHY Core

Electronic News, June 26, 2000

MystiCom Ltd., Netanya, Israel, disclosed last week that IBM has licensed its MystiPHY110 DSP-based 10/100 Mbit/sec Ethernet physical-layer (PHY) core. IBM will offer the core as part of its 0.15-micron SA-27E ASIC product line, allowing customers to integrate MystiCom's PHY core into a variety of communication systems including switch-on-chip, router, IP phone, xDSL access boxes, cable modems and telecommunications equipment, MysticCom said. The MystiPHY110 is a PHY core that supports both Ethernet 10BASE-T and Fast Ethernet 100BASE-TX/FX IEEE standards and is operable over cable lengths of 160 meters, according to the company. Using a DSP-based design approach and standard CMOS processes, the core can be ported to multiple process technologies and wafer foundries. The IBM SA-27E ASIC is a 0.15-micron drawn (0.11-micron effective) standard cell/gate array product line that allows customers to integrate up to 24 million gates on a single chip available in laminate, ceramic, plastic ball grid arrays and plastic quad flat packs.

Fairchild Rolls ADC for FPDs

Fairchild Semiconductor International last week released its high-speed, low-cost graphics digitizer targeting high volume PC/consumer flat panel displays (FPDs). Dubbed the FMS9874, the chip is a 3-channel, 8-bit analog-to-digital converter (ADC) with many of the key features that produce superior picture quality, Fairchild said. The FMS9874 offers what Fairchild claims is a new level of cost-effective performance for computer displays in a smaller package. The device optimizes and encodes the analog RGB signal prior to formatting for display on PC consumer FPDs. The chip can also be used to interface LCD projectors, videowalls and other graphics display systems. The FMS9874 is available now at $7.95 each in a 100-pin MQFP package in units of 1,000.

Analog Devices Shows 3G Downconverter IC

Technical details of a front-end chip for downconverting RF in third-generation mobile phones have been unveiled by Analog Devices at the RFIC Symposium in Boston, according to Electronics Weekly, an ENews affiliate. Developed jointly with Mitsubishi Electric, the chip is aimed at wideband-CDMA systems and is capable of providing the full 2Mbit/sec. data rates to wireless handsets, the firms claim. In order to cut down on the number of external components for filtering, the device implements a direct-conversion architecture.