Despite spending slowdown, Intel 90nm process still on track - Semiconductors: Comment

Electronic News, July 29, 2002 by Kevin Krewell

IN MID-2003, INTEL IS expected to begin shipments of Prescott, Intel's first processor in 90nm (0.09-micron) process technology. Prescott and the 90nm process are key elements of Intel's plan to bring die size and processor die cost under control in 2003 and 2004 after the initial Pentium 4 processor (Willamette) pushed Intel's average processor die size to more than 140mm square in Q1 (based on In-Stat/MDR estimates). In general, average die size tends to swell when a new processor generation, such as P4, begins to ramp. It tends to shrink when a new IC process begins to ramp.

The remaining element in Intel's cost containment strategy is 300mm wafers. Intel's present state-of-the-art process, 130nm (0.13 micron), is produced on both 200mm and 300mm wafers. In 200mm wafers this process is called P860 and in 300mm wafers, P1260. Intel produces the majority of its processors using P860 wafers but began shipments from its first 300mm wafer plant, Fab DiG in Hillsboro, Ore., in Qi. Intel should add a second 300mm plant in Q3. The second plant is Fab lix in Rio Rancho, N.M. Intel originally planned a third P1260 plant in Leixlip, Ireland, called Fab 24, but the economic downturn forced Intel to delay that plant until the next process generation.

The 90nm process will be called P1262 and will only be produced on 300mm wafers when it goes into production in mid-2003. The enormous 300mm capacity of Fab DiC, FabliX, and Fab 24 should allow Intel to retire the venerable Fabs ii and 12 from processor production, using them for flash memory or previous-generation products. The high cost of building new fabs and the additional efficiencies of 300mm will entice Intel to upgrade at least one 200mm fab to 300mm for the P1262 process.

Our figures show that the 0.13-micron process actually ramped at about the same rate as the 0.18-micron process using this metric. The 0.09-micron ramp will take off faster than previous generations because of the use of 300mm wafers from the start of the process ramp.

The research is drawn from the In-Stat/MDR report, "Intel Manufacturing Capacity & Die Cost" (#IN020426IN), which provides an analysis of Intel's manufacturing capabilities and chip manufacturing costs. Despite the economic downturn, Intel last year embarked on its largest capital expenditure program ever. In this report, InStat/MDR explores the impact of these expenses and the long-term impact of Intel's 300mm wafer program.

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Kevin Krewell is general manager at MDR. Please contact him at kkrewel@reedbusiness. corn. MDR is owned by Reed Business Information, the parent company of Electronic News.