Fiery Search for ICs to Move Data

Electronic News, August 20, 2001 by Gale Morrison

Shape of network-to-come spurring innovations

RESEARCH TRIANGLE PARK, N.C.--Wildfires are burning all across the communications semiconductor segment right now, for sure. But just as scientists studying the forests have come to find out, only after the old and dead matter built up on the forest floor burns off will new, healthy growth appear.

The imperative of moving data securely and accurately around the world to each and every person, on demand, is going to mow down some of the industry's most sacred traditions. Executives and industry analysts say the network is tossing aside common mode logic, RISC-based microprocessors and the PC DRAM that grew with it so symbiotically--even the entire hardwired, nonprogrammable ASIC model.

Pouring hundreds of millions of dollars into a strategy to win business from the networking gear makers does indeed look like a financial death wish this summer. Daily, analysts use terms for the networking IC market such as chaotic and bloodbath. But the drivers at work here are orders of magnitude larger than the higher-profile, failed dot-coms.

The buildout--or upgrade, or retrofit, whatever you want to call it--of the next-generation network based on Internet Protocol version 6 (IPv6), differential signaling and optoelectronics is a wide-open, 10-year-plus upside opportunity. And only those semiconductor makers that have been ready and willing to spend hundreds of millions of dollars and several years fleshing out radical new approaches will grow in a market that's seemingly burning to the ground right now.

"Network processing is certainly where the technology is growing and is rather chaotic at the present time," said Lane Mason, memory market analyst with Denali Software Inc. of Palo Alto, Calif. Denali sells its modeling and simulation tools to a dozen or so network IC start-ups as well as to the biggest gear makers in the business.

"It's the new opportunity. It's the white space. It's the place to put your stake in the ground and hopefully become the dominant solution," Mason said. "Network processing all around is just very unsettled. Certainly that's where the venture money is flowing. It's not going to someone who's got a me-too PC part to sell."

For a second, discount the vastly complex and demanding business of getting the data as photons and transceived bits from point to point, and just concentrate on the "traffic cop" devices. These network processors see the packets coming and, in picoseconds, must look through the header and data payload, determine relevant destinations, keep only certain data for accounting and statistical review, and route the packets on their way. That's for everye-mail sent, everyemail receipt received, every Web page requested, every detested popup advertisement, every baby picture attachment.

Which companies are putting these traffic cops on the street now, and which hope to do so soon? PMC-Sierra, Vitesse Semiconductor, AMCC, Agere Systems, Intel, Solidum, Silicon Access Networks, Internet Machines, Cypress Semiconductor, IBM, Zettacom, Clearwater Networks, Broadcom and dozens more. This list, hardly complete, doesn't count those companies already acquired by the aforementioned: Lara, QED, SiByte, SiTera, MMC Networks, Maker, C-Port, Extreme Packet Devices and SwitchOn, to name a few.

Mutating Memory

These network traffic cops have special brains and are spawning a number of high-bandwidth memory segments. As IPv6 implementation increases, that spawning will only accelerate as designers look to accommodate the 128-bit address length inherent in the next-generation Internet.

Small companies such as SiberCore, Music Semiconductor, Kawasaki LSI and Lara (now Cypress) came up with content addressable memories (CAMs) designed as arrays of memory elements each with their own logic element in order to compare the memories' contents. These allow the packet processors they are attached to inside a router to access look-up tables and, if there's a match, pull in that packet. Square that 32-bit address being looked up, twice, to get the 128-bit address of IPv6.

"IPv6 is going to require more and more CAMs," said Sab Ventola of Solidum Systems Corp. in Ottawa. "That will impose a bigger processing burden on any design, and if a design includes CAMs, it will obviously require more CAMS... the packets will require more parsing. One of our potential customers that we're talking to has a design that requires dozens of CAMs."

These CAMs don't require special processes at the fab, but there are no two alike, and they present considerable single-source risks, Denali's Mason said. And they are implemented usually in SRAM, and so much more expensive, bit for bit, than any DRAM, he said.

DRAM makers now are falling all over themselves to engineer highspeed look-up memory that they can build on their DRAM fab lines; which, as it stands today, are eating money like whales eat krill. That's a good strategy, as far as supplying the external DRAM for storing packets is concerned, but the legion of network processor start-ups and design teams inside bigger companies is not finding success with embedded DRAM when it wants these look-up tables on-chip, asmany do. In those cases SRAM will stay, design team leaders say.