Version 6 ARMed for Multimedia Apps

Electronic News, Oct 22, 2001 by Tom Murphy

ARM revamps architecture for efficiency, performance

The world is asking embedded RISC processors to grow up and ARM Holdings Ltd. is obliging with the latest version of its architecture, the ARMv6.

John Rayfield, ARM's director of research and development, disclosed details of the ARM (nasdaq: ARMHY) improvements at the Microprocessor Forum in San Jose last week. Cambridge, England-based ARM's improvements are largely revisions to the processor' s instruction-set architecture and come about largely because the company's processors are increasingly being required to execute more complex operations such as video streaming, Rayfield said. ARM microprocessors are also being designed into more multiprocessing systems and the new architecture reflects improvements that will enable ARM processors to be more efficient in such designs, Rayfield said.

The improvements are aimed at keeping ARM as the key licensable intellectual property (IP) core in chip designs. ARM has proven to be indispensable in devices such as cell phones and PDAs. So much so that even Motorola Inc., designer of the market-share leading Dragonball PDA processor, found it necessary to obtain an ARM licensing agreement, or face being left behind by the evolving industry.

But as applications and systems become more complex, ARM processors are being asked to do quite a bit more, Rayfield said. This includes executing instructions out of order, something the ARM's 16/32-bit architecture had difficulty doing.

The ARMv6 is designed around a virtual memory system architecture that acts to make the processor's access to system memory resources more efficient, reduce latency and reduce the processor's memory activity, Rayfield said.

As applications become more intense, sometimes the ARM processor is asked to bite off more than it can chew from memory. That results in instructions being sent around the processor's architecture until the resources are available to feed those instructions into an execution unit. ARM cores have experienced cache flushing problems as a result, Rayfield said.

ARM's solutions are better memory-ordering instructions for the ARMv6, Rayfield said. The company has also coupled the L1 cache memory closer to the processor and added direct memory access capability.

The addition of the DMA allows more memory bandwidth to get onto the processor faster, Rayfield said. The DMA allows video packets to be streamed right into the L1 memory, he added.

The ARMv6 architecture will be incorporated into the next generation of ARM microprocessor cores scheduled for delivery in 2002, according to an ARM release.