Mentor, ASML Team for Mask Tools

Electronic News, Dec 20, 1999 by Gale Morrison

With die shrinks--the lifeblood of the semiconductor business--depending more and more on "tricks with light," i.e., very advanced photomasks, electronic design automation (EDA) is getting more and more involved at the crossroads where chip designs get implemented into masks.

ASML MaskTools, a Santa Clara, Calif.-based subsidiary of Veldhoven, The Netherlands-based ASML, and Mentor Graphics Corp., Wilsonville, Ore., are collaborating to bring ASML mask refinement techniques together with Mentor's Calibre physical verification tools. This agreement follows very closely the increased profile of mask software specialist Numerical Technologies (NumeriTech) Inc., San Jose.

Doug Marsh, president of ASML MaskTools, said here there is a whole new market, which he calls the manufacturability verification market. It includes most EDA customers and most of those in the chip making business, he said.

Customers are increasingly spending for this software that can, among other things, model what the chip patterning light will make of the design as it is laid out. What will be printed and what was designed is not always the same. That's especially true now, when chip line widths are meant to be well below the light wavelength, and when the IC designers can be on different continents, working for different companies, than the engineers who will see that the IC is made right.

A Mentor/ASML team will work at ASML's Tempe, Ariz., U.S. Technology Development Center, where ASML has pledged to begin equipment manufacturing on U.S. soil, as part of the agreement that allowed Dutch ASML to receive U.S. government funding as part of a next-generation lithography drive.

The Tempe team will optimize the Calibre software for the photoresists, masks, illumination sources and lens designs of their joint customers, said Brian Derrick, general manager of Mentor's Physical and Static Verification division. Advanced Micro Devices (AMD) Inc. of Sunnyvale, Calif., is one of their joint customers, suggested Joe Sawicki, director of the Calibre Physical Verification business unit.

Sawicki said a major focus of the ASML/Mentor collaboration would be to implement so-called scattering bars in combination with model-based, not rules-based, optical proximity correction (OPC) and phase shifting. The scattering bars technique is something ASML holds considerable patent rights on, he said.

A second major focus of the ASML/Mentor deal is a flow of tools that does not hold up mask engineering time, said Sawicki.

"Thus far, solutions have been far too slow and flow integration was a nightmare. The point tools weren't going to work in a production environment," said Sawicki. "Customers expect a tape out to happen overnight.

"With some of (our competitors) tools, tape out could take 48, maybe 72 hours to process a single layer. That fits fine for the first few R&D chips, but it's not going to work in a production environment," he said.

Taiwan Semiconductor Manufacturing Co., the largest chip foundry, also said it is standardizing on Mentor's Calibre. With Dataquest last month pegging Mentor's physical verification offering as the best seller in that EDA field (with 40 percent market share), the Calibre group is ending the year on a very high note.

The Calibre tool suite is comprised of OPCpro, PSMgate (the phase-shifting software), silicon vs. layout verification tools (the direct competition with NumeriTech's new SiVL tool), ORC, and PRINTimage.

Mentor bought a small company called OPC Technologies last year to bring that silicon vs. layout technology into Calibre, and released that in full in June, so Sawicki argues that Mentor beat NumeriTech to market with that capability. He thinks NumeriTech should not have pitched SiVL as a first.

"I don't blame them for saying something like that," said Sawicki. "I would say it. It's just not factual."