Simplex rolls SI tools: Library characterization with ECSMs for the high-end, company says - Design Strategies - SignalStorm SOC - Product Announcement

Electronic News, Feb 25, 2002 by Gale Morrison

Simplex Solutions Inc. today (Feb 11) is rolling out its SignalStorm SOC, a new family of tools for analyzing propagation delay, voltage drop (IR) and crosstalk effects via next-generation, hierarchical delay calculation.

When using the tool's ability to characterize effective current source models (ECSMs), SignalStorm SOC delivers accuracy to within 2 percent of SPICE with run times four to 20 times faster than other solutions - all while consuming 80 percent less system memory, said David Thon, director of product marketing at Simplex.

The ECSM capability, Thon said, came from a joint R&D program with Sony Corp. that the two first discussed at last year's International Solid-State Circuits Conference (ISSCC).

"Immediately after, people came up to us and said, 'When can we have this? You've got to commercialize it'," Thon said. "Well, here it is. This is the first commercial implementation of effective current source modeling."

Timing models are standardized and used widely in the .lib format, and are usually supplied by the library vendors, Thon explained. Two well-known library vendors are Virtual Silicon Technology Inc.-which by the way said today it has closed a $20 million round of financing-and Virage Logic Inc. In fact, it's the existence and acceptance of .lib that's allowed companies like these to exist.

"But for the really leading-edge designs at the top companies, teams will usually do their own library characterization," Thon said. "And, especially for a few of their really critical cells, ECSMs give them more. .lib is great-up to a point," Thon explained.

"It's kind of counter-intuitive, but when there is the change in signal voltage, say from 0 volts to 1.2 volts, effective capacitance changes. But the change is not linear, it does not follow a straight line along with the voltage change. Most timing models look at that as a straight line. ECSMs don't; they are more accurate than that."

Thon emphasized that Simplex is not out to single-handedly force a new standard. The company took an extensive customer survey, a spokeswoman said, and found that users were happy with their static timing analysis, but that they needed better delay calculation. This new product was the best way to give them that, she said. SignalStrom SOC also characterizes .lib models.

The SignalStorm SOC technology has already been employed by Simplex's SOC design foundry team on 19 production designs for customers, including Sony Computer Entertainment Inc. One part has been fabbed at 0.15-micron, runs at 700MHz and tallies up at 287 million transistors. The core of Simplex' SOC design foundry group is the design services group it bought with its fall 2000 purchase of a company called Altius.

Sony gave Simplex a decent plug in today's announcement.

"The ability of Simplex's SignalStrom SOC technology to calculate delay to within 2 percent of SPICE, at gate-level speed, played an important role in first-pass timing closure for our Graphics Synthesizer I-32 chip," said Hidetaka Magoshi, vice president of system LSI design at Sony Computer Entertainment.

"SignalStorm SOC's accurate timing characterization and hierarchical delay calculation were two of the main technologies applied in the design methodology that enabled delivery of this groundbreaking chip's physical design in just 10 weeks."