HP sees no gain in 'mainframe' tag for new RISC lines

Electronic News, May 25, 1992 by Gerry Khermouch

NEW YORK--Heeding a marketing lesson that Digital Equipment Corp. may have learned the hard way, Hewlett-Packard Co. last week unveiled two lines of RISC-based systems that were described as offering the performance and reliability of a mainframe but were not labeled as mainframes.

As anticipated, the Palo Alto, Calif., systems firm brought out both proprietary and Unix lines based upon a 60MHz iteration of its PA-RISC processor and employing a 1GBps processor memory bus (EN, May 18). The high-end, four-CPU symmetric multiprocessors were said to offer over 400 transactions per second and a variety of high-availability features, putting them deep into mainframe territory. The Proprietary HP 3000 Model 990 and 992 units will be available in August, and the Unix HP 9000 Model 890 early in the fall.

While the company has explicitly targeted IBM's installed base as a prime source of potential customer, HP executives at the roll-out here were careful not to categorize the new units as mainframes. And in contrast to the rhetoric of the past year, they spoke less of "replacing" IBM mainframes and more of "coexisting" with IBM systems and "offloading" applications from IBM hosts.

"Is Hewlett-Packard going into the mainframe business? Not really," said Lewis E. Platt, HP executive vice president and head of the Computer Systems Organization. "We're clearly going after the data center that is the heart of the mainframe business, but we're not trying to build a better mainframe as DEC tried to do a couple of years ago with the VAX 9000."

Far from reflecting any fundamental shift in HP's marketing approach for its mid-range and high-end systems, the change was a tactical choice drawn in part from observing DEC's experience in challenging IBM with the poorselling VAX 9000, according to Pat Adamiak, product line manager for HP's Commercial Systems division.

By calling the VAX 9000 a mainframe, Mr Adamiak said, DEC selected a term that would hold little appeal to new ranks of MIS managers willing to experiment with client-server models and move away from traditional, mainframe-centered computer hierarchies. At the same time, Mr Adamiak said, the term wouldn't curry much favor with MIS managers at large firms, who won't accept as a mainframe any system that doesn't run CICS and other software identified with IBM.

As for the idea of "replacing" IBM mainframes, Mr. Adamiak said HP officials had concluded that such rhetoric might not always be useful in trying to win customers among MIS executives who had committed massive investments of money and prestige to accumulating high-end IBM machines.

Labels aside, however, the new systems, which were two years in the design cycle, were configured to address the specific requirements of glass-house customers. On the performance side, the 1GBps bus offers 10 times the bandwidth of HP's previous high end in the line, while a second "snooping bus" minimizes interrupts by allowing a given processor to look into cache or memory without bothering the CPU that may already be addressing the same space.

On the I/O side, eight 32MBps channels offer 256 MBps of physical I/O, a figure that can be effectively doubled through mappedfiles software available on the proprietary MP/IX operating system.

"It's actually overskilled for a system of that level of performance, but the package was built from the ground up as our package for the 1990s," Mr. Adamiak said. The enhancements improved systems efficiency enough to bring a 3.2-fold performance increase in scaling from one processor to four processors--far better than the rough doubling attained on HP's existing multiprocessor line and those of some competitors.

HP officials confirmed that the new systems eventually would be available in 16-CPU SMP configurations. Rich Sevcik, general manager of the Commercial Systems division, said the next upward jump of the CPU would be to the 100MHz clock-speed of the 7100 RISC processor, probably in early 1993.

The new systems also address the high-availability concerns of glass-house users through such features as an error-correcting bus and mirrored disk storage. Also new is a fully redundant I/O path, although that won't be supported by the system software until around yearend, Mr. Adamiak noted.

Looking further out, Mr. Adamiak said HP has succeeded in its labs in putting two RISC processors on a single board, providing the foundation for configurations that would incorporate redundant processors supported by the redundant I/O paths. That approach could be adopted by 1994, he said.

Also under consideration for the 1994 timeframe is mirrored memory, if costeffective ways can be found to achieve that benefit without having to adopt a "brute force" approach of actually doubling the physical memory, Mr. Adamiak indicated.

Even with its existing mid-range lines, which will all continue to be marketed, HP claims to have made significant inroads into the IBM installed base. In the past year, more than 100 IBM customers have offloaded or replaced applications from their mainframes to HP units, officials said last week.