Lam Research debuts TCP Etcher; values Singapore order at $15M

Electronic News, Nov 2, 1992

FREMONT, CALIF.--Lam Research introduced a transformer coupled plasma (TCP) etching machine targeted at sub-half-micron polysilicon gate etching of 16-, 64- and 256-megabit memories. The TCP 9400--ranging in price between $1.1 million and $1.3 million--is available 16 weeks after receipt of order and will be shown at Semicon/Southwest next week.

The new system was developed in cooperation with Sematech and is on order by at least eight companies around the world, said Lam. Several systems have been installed in beta sites for the past eight to nine months, including at least one at LSI Logic. Lam said the new system, which is currently being offered as a stand-alone, single-wafer system, is built on the company's existing Rainbow etch platform. Karl Heiman, product marketing manager for Lam's polysilicon business unit, said the system will be configured into Lam's new Alliance cluster tool "whenever applicable."

The system is billed as a cost-competitive, simpler alternative to three etch technologies already on the market: helicon, helical resonator and electron cyclotron resonance (ECR). TCP uses a low-density, high-pressure planar plasma source, which is said to provide better process control and uniformity. Lam received a patent for the technology about a year ago, he added.

In addition, TCP incorporates a dry-resist or dry-etch process rather than the wet-etch process currently used. This, along with the simpler design, means the need for plasma cleans is eliminated, and the number of consumable parts decreases, said Lam.

In another development, Lam placed the value of an order from TECH Semiconductor Singapore Pte. Ltd. (EN, Antenna, Oct. 12) at $15 million. The TECH order includes multiple Rainbow plasma etch systems, including the Rainbow 4420 polysilicon etch and Rainbow 4520 oxide etch tools. TECH vice president of operations Lee K. Choy said the systems would be used to meet 0.5-micron process requirements for production of 16M DRAMs.

Lam said initial installation of the systems in a baseline evaluation line at TECH's 200-millimeter, class 1 wafer fab will take place in January. Installation of machinery for a full production operation will take place in June of 1993.