LSI Logic ASIC cores aim at ATM markets

Electronic News, August 2, 1993 by Reinhardt Krause

MILPITAS, CALIF. -- With momentum for Asynchronous Transfer Mode (ATM) networking building fast, LSI Logic later this month will roll out its ASIC megacore-based strategy based on RISC processors, pseudo ECL high speed I/O cells, and a multiport memory subsystem.

In recent months, LSI Logic has been working with Fibermux, Europe-based Ascom, Cabletron as well as other hub, router and adapter card suppliers to build up a family of ATM-specific building blocks.

While LSI Logic views ATM as being adopted first by hub vendors, it is also seeking to provide a soup-to-nuts solution for bringing ATM as close to the desktop as possible.

"The challenge as we see it is to reach a price/performance point that competes with or betters FDDI and, at the same time, deal with a standard that is still in flux. It also has to be done at a level of integration that allows it to be housed on something close to an S-bus type sized adapter card," said Tony Stelliga, director of networking and telecommunications products. "The concept of being able to perform Ethernet termination, the routing functionality and the ATM segmentation and reassembly, where the ATM conduit is carrying voice, video, and data is something we see as a big opportunity for us. The closer you can get ATM to the desktop, the less you have to worry about multiprotocol routing."

With embedded Mips or Sparc cores, LSI Logic believes high speed RISC processing can provide some level of reprogrammability while the ATM standard is still in flux. Mr. Stelliga, who attended an ATM Forum meeting in Ottawa last week, said changes in specifications for signalling and congestion control are still possible, for example.

Meanwhile, other vendors are taking note of the value of a RISC/ATM interface. Silicon Graphics Inc. (SGI) is developing a single IC integrating a Mips R4000 processor, on-chip interface controller and cache memory to handle ATM decoding and other functions for a planned interactive multimedia set-top box (see page 15).

While LSI Logic is not involved in SGI effort, Mr. Stelliga said, "We do believe the Mips architecture itself has very strong packet processing capabilities." LSI Logic's family of ATM-specific building blocks, Mr. Stellliga said, includes "a family of pseudo ECL high speed I/O cells with very low skew to terminate 155Mbps traffic on a CMOS ASIC in multiple line formats.

In addition, there is a application-specific memory family to process header traffic. "Typically SRAMs are not very well suited to ATM type applications. If you take a look at the ATM cell itself--at 53 bytes it's not a nice multiple for the SRAMs on the market," Mr. Stelliga said.

LSI Logic and Europe's Ascom have developed an ASIC implementing the 155Mbps ATM standard for broadband networks. The physical layer input/output (PLIO) chip supports the OSI Model transmission layer in accordance with CCITT I.432 specs.

Ascom engineers in Berne and Hombrechtikon, Switzerland designed the ATM circuit design using object-oriented programming tools, while LSI Logic integrated the 35,000 gate device into an ASIC. LSI Logic will make the device for Ascom, which will probably license its technology for LSI Logic's core cell library, according to an Ascom spokesperson. The technology transfer is still being negotiated.

Mr. Stelliga noted the Ascom 0.7 micron device, packaged in a ceramic pin grid array, dissipates less than 2 W. Ascom said the ASIC implements functions previously requiring six double-Eurocards dissipating 100 W. Earlier this year, LSI Logic teamed with hub vendor Fibermux to develop a ATM switch chipset.

As ATM gains momentum, some industry observers are pointing to new implementations such as the SGI set-top box, but also extending to possibilities such as embedding ATM/RISC switches directly on displays.

LSI Logic's roadmap also includes designs to facilitate multimedia applications. "We have a strong posture in the multimedia marketplace with JPEC and MPEC solutions as well as the audio compression," Mr. Stelliga said. "The ability to have a RISC processor, the MPEC compression technology, the audio compression and the high speed I/O in a half million gate CMOS portfolio is exactly where we are heading."

LSI Logic's push into the ATM market also complements its expansion into the networking area with products for switched Ethernet and wireless communications. Mr. Stelliga said the company is also developing products for the Fiber Channel Systems Initiative for peripheral connectivity as well as the Scalable Coherent Interface for clustered, multiprocessing applications. LSI Logic has also embraced the emerging Peripheral Component Interconnect local bus originally from Intel that has gathered wider backing.