Tadpole switches Sparc sources; designs in ISDN, PCMCIA

Electronic News, Feb 21, 1994 by Reinhardt Krause

AUSTIN, TEX. -- Tadpole Technologies, Inc., has moved from Ross Technology's multichip module-based Sparc implementation to Texas Instrument's 50MHz MicroSparc for its new SparcBook 3 portable Unix workstation. Tadpole said it made the move because of software issues relating to porting Sun Microsystems' Solaris operating system.

In another development, Tadpole said it will not be able to use the new MicroSparc II processor being manufactured by Fujitsu for at least six months. Geoffrey Burr, president of Tadpole, said the 0.5 micron, 70MHz microSparc II CPU is still sampling in "infinitesimal amounts"; Sun Microsystems announced the part last year (EN, Oct. 18, 1993) and said the part was sampling then.

The loss of Tadpole's business is significant for Ross Technology, the former Sparc subsidiary of Cypress Semiconductor that is now owned by Fujitsu. About two-thirds of Tadpoles $35 million in business last year was based on sales of its SparcBook 1 and SparcBook 2 systems; the other third was in OEM sales. As an OEM, Tadpole is providing IBM with a notebook workstation that is largely based on the SparcBook 3's design, but uses the PowerPC 601 processor.

Mr. Burr, formely senior group manager of Digital Equipment Corp.'s PC business, said Tadpole sswitched to TI's TMS390S10 MicroSparc processor, which provides 59 Mips performance, to ensure complete software compatibility with Sun Microsystem's Sparc-Station LX. He said because Ross's Sparc implementation did not provide "open boot" support for the Solaris OS, Tadpole had grown frustrated in keeping up with the many upgrades of the software.

Mr. Burr added that the open boot, a PROM-like BIOS providing Sparc standard Solaris, requires the same I/O devices that Sun uses. Ross officials could not be reached for comment; nChip assembles the Sparc-based multichip modules but is not involved with the chip design.

As a result of discontinuing the use of Ross's Sparc implementation, Tadpole had to redesign its motherboard and packaging. The new 6-lb. SparcBook 3 is implemented with a 12-layer, double-sided surface_mount board that also employs TAB (tape automated bounding) for the microprocessor. The SparcBook 2 had used a six-layer board design.

Eric Bieri, product marketing manager at Ross, said he believed Tadpole's decision was motivated by cost factors more than software issues. "At least that's what they told us," he said. "They were looking to cut their (processor) cost by a third to a half." "TI's MicroSparc is a low-cost version of that processor generation; it's hard to compete with wur chipset."

However, Mr. Bieri said Ross is still in the running for a future design-in at Tadpole based on its upcoming HyperSparc implementation, which is now En internal productions runs. The new HyperSparc implementation also uses multi-die packaging.

Mr. Bieri said that Tadpole is planning to roll out a high-end product in addition to the SparcBook 3, which is initially priced 10 percent higher than the SparcBook 3) is not a high-end machine," he said. "Also, they're hsving a resurgence in orders for the SparcBook 2."

One factor tht could work in Ross's favor in the future is that Sun is apparently ready to announce soon that HyperSparc implementation will support Solaris 2.3. Solaris 2.3 is also being ported to the MicroSparc II.

Tadpole has developed two versions of the SparcBook3: the high-end version is priced at $10,950 and is equipped with 2MB VRAM frame buffer, color 9.4-in. TFT LCD from Sharp, 16-bit audio and ISDN controller. The SparcBook 3LC, $7,500, comes with 1MB VRAM frame buffer, monochrome passive display, 8-bit audio and does not provide the ISDN controller.

The ISDN controller was designed with tools from VLSI Technology, which will act as the foundry. The ISDN controller combines a DMAC and data format converter. The controller features a concentration highway interface that provides a variety of different serial framing standards and data rates to the audio codec.

Tadpole sourced Crystal Semiconductor's 16-bit audio codec for the SparcBook 3 and Advanced Micro Device's 8-bit audio codec for the SparcBook 3LC. Tadpole also designed-in Cirrus Logic's LCD controller, a graphics palette from Brooktree, NCR's master and slave I/O devices and a graphics accelerator from WeEtek.

Mr. Burr said that Tadpole had to develop its own ASIC to design-in PCMCIA slots into the SparcBook 3, including software drivers for card and socket services. He said no support existed for portable Unix PCMCIA implementations. The TS102 ASIC designed by Tadpole interfaces between the Sbus and the PCMCIA bus and provides the interface for two cards.

The SparcBook 3 also uses Tadpole's version 2 of the Nomadic Computing Environment (NCE), which IBM has also licensed for its upcoming AIX-based portable workstation. Tadpole originally developed NCE for the SparcBook 1 and SparcBook 2 for portable Unix applications.

While Tadpole claims to have garneered the lion's share fo the market for portable Unix workstations, it may soon face more competition. Acer America, which thus far has rolled out a 17-lb. portable Unix-based workstation built aroDnd 33MHz RS/6000 processors for IBM's Advanced Workstations and Systems group, is reportedly planning a smaller implementation based on Mips Technologies' RISC processors.