MCM advocates lure would-be users

Electronic News, April 11, 1994 by Bernard Levine

Also on the product front, "ROSS Technology, Inc., and nCHIP, Inc., have successfully produced a second-generation SPARC processor multichip module," based on ROSS' hyperSPARC architecture, according to a paper by David B. Tuckerman and Donald Benson of nCHIP, San Jose, Calif., and Howard Moore, John Horner and Jim Gibbons of ROSS Technology, Austin, Tex.

"The MCM is packaged in a 45mm-square 256-lead, ceramic quad flat pack carrier, and is footprint-compatible with ROSS' current SPARC MCM, the GYM6111. However, the new module runs at clock speeds in excess of 80MHz, giving more than twice the performance of the GYM6111, and will offer 3-5 times the performance in most applications.

The full module contains six CMOS chips: a CPU containing both integer and floating point ALUs, a cache controller/memory management unit, and four cache RAM chips. Each chip uses both 3.3V and 5.0V power supplies, so the MCM substrate incorporates a split power plane. The chips are interconnected using nCHIP's nC1000 substrate technology which incorporates aluminum interconnect, SiO2 dielectric, and an integral decoupling capacitor. ROSS's multichip design strategy does not depend on massive integration or complex fabrication processes; similarly, the nCHIP nC1000 substrate process is based on a robust, IC-like technology. This combination provides excellent manufacturability and allows a fast production ramp into high volume."

Flip-chip assembly is addressed in an AT&T paper. T.D. Dudderar, Y. Degani, J.G. Spadafora, K.L. Tai and R.C. Frye of AT&T Bell Laboratories, Murray Hill, N.J., note, "the realization of a high-speed, high-yield flipchip assembly capability is essential to the development of a practical, cost-effective MCM technology because it supports large volume, relatively inexpensive product applications in which equipment costs per unit can be minimized." Their paper "describes a novel assembly technique for flip-chip siliconon-silicon Multi-Chip Module (MCM-D) tiles which readily meets the above criteria. This new hybrid technique, which is called AT&T [micro]SMT, involves stencil printing a custom AT&T ultra-fine pitch solder paste directly onto a silicon fabric wafer which is then populated with bare die and reflowed, much as surface-mount packaged components would be assembled onto a circuit board. This approach is capable of achieving higher component and interconnection densities than can be achieved with any fine-pitch SMT design--and at a lower unit cost at large production volumes than can be achieved with any other MCM assembly technology."

Japan's NTT reports on "Multichip module technologies for high-speed ATM switching systems." Shinichi Sasaki, Tohru Kishimoto, and Kouichi Genda of NTT Communications Switching Laboratories and Kenichi Endo and Katsumi Kaizu of NTT Electronics Technology, Inc., note, "high-performance, compact multichip modules using a copper polyimide multi-layer substrate are used to make a 40Gb/s.-throughput ATM switching module. The MCM substrate has 392 highspeed signal I/O channels, thin-film termination resistors, and 50 Bm laminated capacitance layers."