Synopsys unveils power tool for ICs, ASICs

Electronic News, Sept 19, 1994

GRENOBLE, FRANCE - Synopsys is introducing DesignPower, a tool for analyzing power requirements of IC and ASIC designs early on in the design process. The product is being rolled out at this week's Euro-DAC '94 conference.

DesignPower is priced at $30,000 in the U.S. It is currently in beta testing and scheduled for initial customer shipments in Q4. Beta sites weren't identified, but they are said to include manufacturers of cellular phones and pagers.

"After (IC) area and timing, power is next," said Kelly Gomes, product line manager at Synopsys. "Power is absolutely becoming a driving factor."

The increasing compaction of IC and system designs is forcing the use of lower-power designs to save on battery usage. Lowering the power requirements also helps reduce the heat an IC generates in operation, which in turn reduces the need for fans and other cooling devices in a system set-up.

"Power consumption is now as significant a driving force in some ASIC designs as area and performance," said Ron Collett, president of Collett International. "We see more and more ASIC designers facing power management challenges in their designs."

Traditionally, power management was not taken into account until the layout stage of an IC design, according to Synopsys. DesignPower is a gate-level power analysis tool, Ms. Gomes said, which works at the gate level, register-transfer level (RTL) or library level.

Previously, engineers would calculate the power needs of a system design by taking out databooks on the ICs involved and doing some rough calculations on the back of an envelope or with a spreadsheet program, according to Ms. Gomes. With DesignPower, designers can use hardware description language (HDL) and gate-level design trade-offs early in the process, before layout. The modeling in DesignPower provides estimates of switching (capacitive), short-circuit (internal) and leakage power, using actual or estimated switching activity as input.

DesignPower can be used in conjunction with Synopsys' VHDL System Simulator (VSS) and other VHDL and Verilog simulators. It is also complementary to transistor-level power analysis tools, such as PowerMill from Epic Design Technology and Spice simulators. "With DesignPower, Synopsys is filling a growing need we're seeing among customers designing ASICs and ICs for power-sensitive applications," said Simon Napper, vice president of marketing for Epic.

DesignPower uses two approaches to power analysis: probabilistic and simulated power analysis. Probabilistic power analysis is fast and well-suited to assessing high-level trade-offs quickly, according to Synopsys. It is based on user-defined input probabilities.

Simulated power analysis is more accurate than probabilistic analysis since it is based on the actual switching activity of primary inputs and internal nets directly from a logic simulator, said Synopsys.