VLSI will add its fastest ARM6 core

Electronic News, Sept 19, 1994

SAN JOSE, CALIF. - VLSI Technology is set today to introduce a functional system block (FSB) cell addition to its Advanced RISC Machines (ARM) product family. VLSI said the VYF86C06-004 ARM6 FSB cell, operating at a 45MHz clock rate, will be the fastest member of its ARM product line and the highest performance ARM processor core available.

The new VYF86C06-004 FSB cell is a 32-bit ARM RISC core, operating with a 3.3-volt supply. It exhibits a peak performance of 45 MIPS and sustained performance of 38 Dhrystone 2.1 MIPS, according to VLSI. The company's 0.5micron, three-layer metal CMOS process enables a core size of just over 4mm square and a total power dissipation of 110 milliwatts, addressing the needs of embedded systems OEMs.

VLSI said the new ARM6 core will be used as the baseline core for future VLSI product options, including fast multiply and debug extensions. All of these cores are supported with models for both hardware and software development. Hardware models are available for VHDL, Verilog and COMPASS simulation environments. The C-model of the core is also integrated into the firm's JumpStart graphical mixed-mode development environment.

The VYF86C06-004 ARM6 FSB core is currently available for design starts. Pricing varies depending on configuration.

In a separate but related move, VLSI is making available JumpStart 2.1 - a set of symbolic, graphical development tools for the 32-bit ARM RISC processor. JumpStart allows a combination of either mixed-mode (C and assembly language) or raw assembly language code debugging. Modifications to assembly code can be made and reassembled in-line.

JumpStart 2.1 prices start at $3,000 in single quantities, with quantity purchases available at a discount. Full production delivery is slated for mid-November.

VLSI Technology also will today reveal it has entered an agreement with LightStream Corp., Billerica, Mass., to develop custom ASICs for routing and bridging features in LightStream's line of asynchronous transfer mode (ATM) switches.

First use of the custom silicon will be in the LightStream 2020 ATM backbone switch (a low-cost ATM platform for switching, bridging and routing of integrated LAN/WAN, enterprise-wide solutions) introduced last week at the NetWorld Interop trade show in Atlanta.

Under a previous two-year-old agreement, LightStream integrated its internetworking and cell segmentation/reassembly technology onto silicon using VLSI's FlexArray technology, enabling support for full line-speed internetworking of Ethernet and FDDI with ATM switching.

"Our cooperative program with VLSI has allowed us to develop four highly complex ASICs and to complete extensive system testing within a very short time," said LightStream. "All four chips worked the first time, eliminating costly and time-consuming redesign cycles. This was especially important considering our aggressive implementation schedule. With VLSI's help, we were able to bring our second generation ATM product to market very quickly."

Lightstream is 80 percent owned by Bolt Beranek and Newman Inc., Cambridge, Mass., and 20 percent by UB Networks Inc., Santa Clara, Calif., a Tandem Computers subsidiary.

"VLSI's Flexarray technology allowed LightStream to design four different gate array personalizations around a single core of high-density, cell-based memory and logic," VLSI said. Combining FlexArray technology with VLSI's proprietary FSB (functional system block) cells in T1/E1 (1.544Mbps/2.048Mbps), SONET (Synchronous Optical NETwork)/SDH (synchronous digital hierarchy) and ATM applications, our customers can accelerate their product development cycles and still include differentiating features in their systems."