Manufacturing Industry

Intel offers some peeks at products, production

Electronic News, April 3, 1995 by Jim DeTar

SANTA CLARA, CALIF. - At an unusual technology briefing at its corporate headquarters here, Intel last week outlined a series of product plans, technology directions and manufacturing expansion objectives which are likely to overhang and influence the market indefinitely. Among the finer points discussed by Intel were the following:

* Confirmation of a widely-discussed shift in manufacturing of future x86 microprocessors, including the upcoming P6, to the CMOS process from its traditional BiCMOS process.

* The likely rollout of four new frequencies of Pentiums over the course of the next year or so on the company's new 0.35 micron process, dubbed P854, unveiled along with its 120MHz Pentium processor (EN, March 27)

* The ramp-up of the new 120MHz Pentiums at its D1 factory in Oregon amid simultaneous preparing of two other fabs to come on-line at 0.35 micron by 1996.

* A move to 0.25 micron for future x86 MPUs starting in 1997.

Intel introduced a 3.3-Volt BiCMOS and 2.5V CMOS versions of the 120MHz Pentium at the recent Windows Hardware Engineering Conference (WinHEC), and according to Intel fellow Mark Bohr, the move from BiCMOS to CMOS for x86s is clearly related to continued shrinkage of geometries and voltage levels.

Intel dropped the bipolar transistors in the CMOS version, prompting Mr. Bohr to comment: "What we find is that as we reduce the supply voltage from 3.3V to 2.5V, the added performance advantage of bipolar devices diminishes. So we feel it's just not worthwhile having bipolar devices when we reduce the supply voltage. So instead, we focused on making our CMOS as fast as possible. Also, by dropping bipolar devices, we're going to reduce complexity of the devices... by eliminating the process masks associated with bipolar transistors."

For example, he said the 3.3V 120MHz Pentium has 20 masks, while the 2.5V version only has 16 masks. "So the 2.5V process is targeted for even higher performance than the 3.3V process, at lower power because of reduced power supply, and reduced cost because of the lower mask content. And we will be, in the future, introducing products on this version of the technology."

He also revealed that P6 will be manufactured on 2.5V CMOS process. "P854 is slated for volume production of the P6 processor. This family of products will be done on the 2.5V CMOS version of the 854, obviously optimized to make full use of the density and performance capabilities. And these products will be available in 1996."

In addition, Mr. Bohr said the four new frequencies of Pentiums rolled out on the new 0.35 micron process will be better able to take advantage of the P854's density and performance capabilities. The planned frequencies include the 150MHz device which Intel has already said it plans to introduce later this year (EN, Feb. 21, 1994) as ell as 133MHz, 166Mhz and 180MHz versions.

"This (120MHz Pentium) is an optical shrink done on the Pentium 0.6 micron technology - this is an optical shrink of the 100MHz product. So, as a result, it does not make fun use of P854's density and performance capabilities. But it is available now. Later this year, we will be introducing further enhancements of the Pentium at speeds of 150MHz or greater - again on a 3.3V BiCMOS version. They will be optimized to make full use of the density and performance capabilities of the technology."

Meanwhile, Robert Jecmen, VP of Intel's Technology & Manufacturing Group, provided a glimpse at Intel's manufacturing plans for the remainder of the decade, starting with Oregon, which is the site of four Intel factories, including Intel's oldest and newest processes.

"The Oregon site has two older factories: Fab 4, our only 4-inch factory, and our 6-inch factory (Fab 5) running between 0.6 micron and 1.0 micron. D1, which is the first 0.35 micron technology at Intel, is beginning its ramp of production of 0.35 and it's also hosting the 0.25 micron development activity at this point. And under construction is the D1B plant which is designed to support sub-0.25 micron technology development as well as future manufacturing."

Intel's 0.25 micron technology is not expected to be in production until late 1997, according to Mr. Jecmen, and Intel is presently completing what it calls Phase 3 of its Santa Clara, Calif. site expansion (EN, Oct. 24, 1994) in preparation for production of the Pentium P6. "Presently we are running high-volume, 0.6 micron 200mm processing here which supports our second-generation Pentium processor as well as the first-generation P6. And the Phase 3 is under construction now - well under way - and is expected to be completed by the end of this year."

Santa Clara will be home to Intel's first 0.25 micron MPUs, including the P6 and P7, Mr. Jecmen added. "It will be utilized for the completion of the 0.25 micron logic development activity and it will become the first volume 0.25 micron manufacturing plant. It will be developed and ramped, then ramped to production in place here at this site, which will give us the advantages of time-to-money, not having to transfer it to another site...and of using the same personnel ...to seamlessly go from development to volume manufacturing


 

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