DAC will air FPGA effort on PC specs

Electronic News, June 12, 1995 by Jim DeTar

SAN FRANCISCO, CALIF.--One highlight expected at this week's Design Automation Conference (DAC) here will be the announcement of the formation of the Plastic Architecture computer Consortium (PAC)--a collaborative effort among field programmable gate array (FPGA) companies to bolster the market for reconfigurable computers by setting standards for language and interfaces.

In a related move, Xilinx--a PAC founding member--will today announce a $20 million marketing and product development program aimed at developing and promoting reconfigurable FPGA products. In addition, sources at Xilinx said the company plans to introduce its XC6200 SRAM FPGA family for reconfigurable systems in the near term, probably within the next 60 days.

Unlike traditional computers locked into a particular processor architecture, reconfigurable computers can be adapted to the necessary process architecture. Proponents say this potentially translates into a low-cost computer configured to meet the needs of certain non-PC markets such as computer games, TV set-top boxes, networking switches and routers and neural network research systems.

PAC was created to fill a perceived need for reconfigurable computing standards and interfaces. It is widely believed such standards must be put in place if reconfigurable FPGA computing is to become a commercial success. Other charter PAC members include: Altera, Atmel, National Semiconductor, Hewlett-Packard, Virtual Computer and Harmonix in the U.S.; plus Japan's Nippon Telegraph and Telephone (NTT) Laboratories and NTT Data Communications Systems.

Commenting on the formation of PAC, Harmonix president Shey Hakusui said in a written statement: "The plastic architecture computer has many varied and intriguing potential applications. These include areas ranging from set-top boxes for digital TV broadcasting (multi-protocol), telecommunications and networking (packet switching and routing), video arcade games, neural network research, optical computing and scientific research and analysis."

PAC intends to set the I/O standards for interfacing with operating systems at the software level. "Therefore, most reconfigurable computers can be made to comply with the PAC standards without modifying the hardware, but by merely adding PAC standard headers," Harmonix said. In addition, any application written under these standards would be compatible with different computers at the source-level code.

In addition to software, a standard hardare platform needs to be developed, according to Chuck Fox, Xilinx VP of marketing. "We expect some companies will come out with platforms with so many FPGAs connected in a certain way, and they will drive that as a standard. Probably a de facto standard will emerge if they find a killer application."

Xilinx will launch its assault on the reconfigurable FPGA market with a Reconfigurable Computing Developers Program that includes discounts of up to 50 percent to purchasers of Xilinx FPGAs for reconfigurable systems, and the allocation of commercial development grants of up to $20,000 each, totalling up to $1 million annually starting this year.

In addition to grants and product discounts, the company will allocate significant resources to development of reconfigurable FPGAs. Total cost of the marketing and development efforts is estimated to be around $20 million over the next three years, the company said. Curt Wozniak, president of Xilinx, said the market for reconfigurable computing is in critical need of a "kick-start" and that Xilinx intends to play that role.

"For years, evangelists of reconfigurable computing have communicated to us, the primary FPGA supplier for these applications, directly and through our third-party software developers and FPGA consultants, the viability of such applications. With our development of very low-cost, extremely high-capacity devices, we have the enabling FPGA technology in place to create a significant market," Mr. Wozniak said.

Xilinx estimates the reconfigurable FPGA systems market will grow to $1 billion in sales by the end of the decade, with the FPGA portion of those systems reaching about $200 million.

Recently (EN, May 22) Xilinx said a planned, SRAM-based XC6200 FPGA family--code-named Excalibur--will be its first FPGA to be both partially and fully reconfigurable. The XC6200 will feature high density, with gate counts reaching 100,000 in 1996, as well as optimized processor interface (8-, 16-or 32-bit), dynamic partial chip reconfiguration and a symmetric architecture.

Mr. Fox said last week the 6200 will be unveiled shortly. Noting it will be targeted at the reconfigurable coprocessor market, he asserted that "The 6200 can reconfigure 1,000 times faster than current FPGAs." He said the increase in speed will be achieved by the acceleration of software algorithms. "We have examples of systems available today that do that like Virtual Computer, Giga Operations and the Splash system."

Altera is taking a different approach, waiting until the market develops rather than trying to drive it, according to chief scientist Dr. Nick Tredennick. Although the company rolled out an RIPP board early last year (EN, Feb. 14, 1994) allowing developers to put up to eight existing Altera FLEX 8000 devices on board, it is not actively developing any chips specifically for the reconfigurable computing market. The FLEX 8000 does not allow both partial and full reconfigurability.