Motorola slates custom program in ASSP markets

Electronic News, June 26, 1995 by Reinhardt Krause

CHANDLER, ARIZ.--Motorola's Semiconductor Products Sector this week will unveil its Customizable Standard Products (CSP) program targeting asynchronous transfer mode (ATM) networking, Fibre Channel, and digital video broadcast (DVB) applications.

Although ASIC vendors such as VLSI Technology and LSI Logic have thus far won a large number of design-ins in the ATM networking area, Motorola's CSP program is tied to the need for application-specific standard products (ASSPs) as the market matures. Siemens is also now targeting the ATM area with ASSPs (EN, March 13), but Motorola's initial strategy is to offer some customization options to customers.

The ATM Forum is still setting new standards, such as UNI Spec. 4.0 which encompasses congestion control, but ATM standards may be firm enough to enable ASSPs to emerge. In addition, Motorola plans to provide some flexibility for different framers or interfaces and about 20 percent of the CSP products will have customer proprietary logic. Other customization could include different sized FIFOs or buffer memories or ROM sizes tailored to embedded firmware.

The CSP program's non-recurring engineering (NRE) will start at about $100,000; Motorola expects design cycle times of 90 days. "Customization of ASSPs developed as part of the CSP program are expected to be priced well below conventional embedded arrays or multi-part solutions that use FPGAs," said Wil Salhuana, director of CSP operations. "The CSP platform provides just enough hooks in its architecture to facilitate customization. This avoids the inefficiencies of communications chips built from general-purpose processors and megafunctions."

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According to Motorola, the standard product features of a given design will result in lower costs; the complex functional blocks (CFBs) that are part of a core are built up using ASIC design methodology. The core is expected to be stable for most designs, although Motorola may make changes on customer request.

"The CSP was architected with customization in mind, customization to the core, customization in integrating user proprietary logic," said Mr. Salhuana. "We have low-cost in mind because we envision ATM, Fibre Channel and digital video broadcast as high volume markets where cost is going to be an issue with our customers as the market matures. So we will be in a position to compete in that type of environment."

Referring to the ATM networking market, he added, "We're not taking, I'm not going to say an in-between (path), but we have in mind that the standard is still emerging, that the market is also maturing and we are also getting ready for when it is a mature market--that it can have a solid ASSPs with low-cost in mind."

Motorola's initial ASSPs will include a 155Mbps ATM segmentation and reassembly controller with UTOPIA interface or SONET framer (MC92516) and an ATM cell processor with UTOPIA interface (MC92500). The MC92500 design involves 175,000 gates, 22K RAM, dual-cell processors and supports multiple physical links.

"We have started with a standard product mentality as opposed to a ASIC mentality where you are just building with building blocks and then trying to assemble them to address an application," said Mr. Salhuana. "With our ATM SAR we have a very specific architecture for SAR with a dedicated processor, which is a 16-bit engine but it's very specialized, a very optimized design for the communications application."

Options for different data rates and connections to PCI and other buses will be available.

In the ATM networking area, Motorola is initially targeting line cards and switches as well as network interface cards. For line cards, the company may be able to leverage other products as well, said Phil Grove, marketing development manager. In a line card appliation, for example, Motorola can offer not only processor and memories but also analog components, transceivers and optical interfaces, he said.

Although some customers may initially use FPGAs as a time-to-market strategy, Mr. Grove said that they may later move to reduce cost by migrating the FPGA into a CSP-type standard device.

In addition to the push into ATM networking, Motorola is eyeing Fibre Channel and DVB applications. One Fibre Channel device will be 1-Gbit/sec clock recovery device manufactured in CMOS technology. In the set-top box area for DVB, Motorola will initially provide a front-end device handling demodulation and error correction.