IBM, Synopsis join hands in R&D design marriage

Electronic News, Feb 19, 1996 by Judy Erkanat

Mountain View, Calif.--Industry consolidation in electronic design automation finally caught up with IBM, as the company announced a six-year R&D agreement with Synopsys to jointly develop tools and methodologies for designing complex ICs with gate counts as high as 10 million.

Synopsys will market and service all products developed by the joint R&D team, as well as acquire certain rights to IBM's proprietary technology for $41 million in cash and notes. An in-process R&D charge of at least $33 million is expected by Synopsys to result from the transaction in the current quarter, ending March 30.

A deal between IBM and Synopsys had been expected for months (EN, Antenna, Nov. 20, 1995).

Aart de Geus, Synopsys' president and CEO, characterized the agreement as "high-level design meets deep submicron." He listed its focus areas as design planning, timing perspective, synthesis and test. Development efforts are already under way and the partners' first tool is expected out within 12-18 months.

"This is a marriage between partners who have already reached an understanding," he said. "It bolsters our position in the lower end of the design process, as well as enhancing our current portion. We want to drive toward a synthesis-driven methodology."

Gary Smith, senior industry analyst at Dataquest, praised the deal, stressing the importance of the combination of the best R&D group in EDA with the best R&D group in the end-user community.

"What's important here is not what tools the companies now have the rights to," said Mr. Smith. "It's what will come out of this that's important. This will evolve IBM and Synopsys' tools into new forms to allow new methodology as designs delve deep into silicon and develop into virtual prototypes to deal with high speed effects."

The two companies intend to set a new standard for complex IC design with next-generation products to handle process technologies with geometries below 0.25 micron, where both believe today's industry-standard design flows fall short.

The agreement couples Synopsys' synthesis technology, a productivity tool for designing high-gatecount ICs, with IBM and its large reservoir of internally developed IC design tools, deep-submicron silicon expertise and engineering resources.

"IBM's ASIC business is growing rapidly and they have outstanding 0.25-micron and six-metal-layer technology," said Dr. de Geus. "All of IBM's external customers were using Synopsys synthesis and we became natural deep-submicron partners. It was clear that IBM had developed tools at a high level. This opportunity mutually strengthens our two companies. We give IBM the sophisticated commercial arm it needs."

IBM entered the commercial EDA software market in 1993, but wasn't able to make many sales. Early last year, it sold its P-CAD product line to Accel Technologies and dissolved the Altium subsidiary it had formed to market its EDA tools.

IBM's advanced deep-submicron silicon and proven sign-off capabilities will be used as a driver for design tool development. Both the resulting design tools and methodologies will be designed to be technology independent and available to all Synopsys semiconductor partners and customers.

Key areas of development will include next-generation synthesis, advanced test methods and tools, design planning and static timing sign-off.

"The design flows being used today for 0.5-micron technologies will not be acceptable below quarter micron," Dr. de Geus said. "To be able to get the best performance possible from the next generation of silicon, designers will need a new design flow. IBM is an ideal partner because they share our vision to develop technology-independent solutions for our customers.