ASIC Semicon unveils novel model

Electronic News, June 24, 1996 by Peter Brown

Santa Clara, Calif.--ASIC Semiconductor, based here, has created a model for an end-to-end application specific integrated circuit (ASIC) business which the company claims will provide the support and services of an ASIC vendor along with submicron gate array libraries optimized for wafer fabs.

"We are both an ASIC vendor with global fab resources and a library vendor with libraries optimized for several foundry choices," said K.C. Shih, ASIC Semiconductor president and CEO.

According to ASIC Semiconductor, an affiliate of United Microelectronics Corp. (UMC), the ASIC industry consists of two segments, ASIC suppliers and library vendors/foundries.

"In the market right now, you have the ASIC vendors that sell ASICs and standard cells, " said Joseph Hong, VP of ASIC Semiconductor. "However you also have high volume users that buy libraries directly, and buy (from) foundries directly."

Mr. Hong said that currently the ASIC industry does not include a company that combines both of these aspects, making a company such as ASIC Semiconductor necessary.

"No one vendor bridges the gap between these two areas in the market," asserted Mr. Hong. "We believe we are blazing the trail... A customer can work with us and not have to go anywhere else to receive support."

The company claims to be able to design more than 200 ASIC devices and produce more than 1 million units per month.

"Today's so-called 'process independent' libraries are generally not fully optimized for any foundry process, whereas our libraries are fully optimized for every fabrication partner within our fab alliance," Mr. Shih said.

The company offers submicron gate array and standard cell libraries. For example, the FG6000A is a family of devices that are manufactured on a single-, double-, or triple-layer metal (TLM) 0.6-micron CMOS process with over 530 I/O- and core macrocells and functions. The TLM devices allow designers to create gate arrays with up to 112,000 usable gates. The FG6000A features an I/O slot concept offering dense packaging for higher pin-count designs.

The 0.5-micron standard cell design family, the FS7000, also is available in either single-, double-, or TLM technology. This library features 570 I/O and core macrocells and can be built with up to 200,000 raw gates, with 64-kilobit SRAM blocks.

Both standard cell and gate array families offer 3-volt, 5V and mixed operational voltage designs. Design kits for the FG6000A and FS7000 families are supported by design tools from Viewlogic, Mentor Graphics, Intergraph, ECS and Synopsys.

Designers can capture and simulate designs up to pre-route simulations then transfer these netlist and test vectors to ASIC Semiconductor for back-end design, production services, and placement and routing.

According to Mr. Hong, ASIC Semiconductor does not have fixed unit pricing on its products; pricing is based on the commitment to volume purchases by the OEM. Mr. Hong also revealed that a 0.35-micron gate array and standard cell family will be introduced in 3Q96.

ASIC Semiconductor was created in 1995 by UMC for the design and manufacturing of ASICs. ASIC Semiconductor's investors include Taiwan-based Faraday Technology, UMC and other private investors. OEM customers come from the computer, communications and graphics markets worldwide. In January of this year, ASIC Semiconductor acquired Pacific Semiconductor.