Manufacturing Industry
EPIC Design in move to buy CIDA
Electronic News, Sept 2, 1996 by Judy Erkanat
Sunnyvale, Calif.--Targeting nanometer-silicon layout verification, EPIC Design Technology, Inc., ended a month fraught with electronic design automation (EDA) acquisitions by signing a non-binding letter of intent last week to buy CIDA Technology, Inc.
EPIC worked closely over the last year with CIDA founder Wai-Yan Ho, who also founded Archer Systems, which EPIC acquired in 1995. "The core algorithms were developed to accurately and efficiently verify the layout of tens of millions of transistors," Mr. Ho said. "The new concurrent verification methodology will allow designers to design and verify in parallel which will dramatically shorten design time."
"This is a reaction to Avant!'s acquisitions of Anagram and Meta-Software," said Gary Smith, principal analyst at Dataquest. "Everybody is charging for the physical verification tools. You can no longer just have DRC (design rule check) tools and expect to take over in this area. You need the entire toolset: DRC and the six analysis tools. I expect to see a flurry of purchasing of these small companies that are targeting the analysis and DRC areas. This is a tool suite, not something you can use in an open environment. Openness is more applicable in the CAE world than in CAD. CAD commits to a company. That's why these guys are running around filling up their tool chests. The question is, now what will Cadence do?"
The EPIC/CIDA deal is expected to close within the next two months. Under its terms, CIDA stockholders will exchange their shares for an undisclosed number of shares of EPIC's common stock and cash. EPIC plans to account for the acquisition using the purchase method of accounting and anticipates incurring a one-time write-off of in-process R&D in the quarter in which the acquisition is consummated.
"CIDA has been developing a new generation of layout verification technology that we believe will offer breakthroughs in efficiency and versatility to address the needs of deep-submicron and nanometer-silicon designs," explained Sang Wang, chairman/CEO of EPIC. "This technology is being created with concurrent verification capability for complex large blocks and hierarchical full-chip layout verification. The CIDA technology is also planned to be integrated into EPIC's existing layout parasitic extraction and reliability analysis products to meet the demands of tomorrow's IC designers."
"EPIC has every intention to solve the nanometer-silicon verification and simulation problems," declared Bernie Aronson, president of EPIC. "With the Archer acquisition, we obtained layout extraction and now, with CIDA, we are moving into the layout verification market. We can integrate timing and power simulators with layout verification to deliver faster, more accurate and higher-capacity solutions."
EPIC and CIDA expect beta testing of the first phase of CIDA's product to begin in 4Q96, with first customer shipping date targeted for the 1Q97. The beta testing of the second phase of the product is targeted for mid-1997.
The consummation of the acquisition is subject to the execution of a definitive agreement, approval by CIDA's shareholders and other customary closing conditions.
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