SanDisk flashes to density-squared

Electronic News, Nov 11, 1996 by Andrew MacLellan

SanDisk has unveiled what it calls Double Density (D2) Flash technology here with manufacturing and development partner Matsushita Electronic. At the same time, SanDisk revealed plans to introduce a 64-megabit flash chip based on the new technology in 1Q97, apparently beating competitor and flash market leader Intel to the punch.

SanDisk's planned 64M D2 flash IC is the result of a six-year joint research effort between SanDisk and Matsushita and will serve as the cornerstone for advanced storage products--both ATA-standard PCMCIA devices and SanDisk's CompactFlash small form factor cards.

According to SanDisk, the new technology doubles storage card capacity, increases read speeds by 50 percent over that of the company's existing 32M flash-based devices, and will lower the cost of flash to $5-per-MB in 1997 and $1/MB in the year 2000. Matsushita will manufacture the 64M device on its 0.5-micron process and will ship all of its product to SanDisk.

The D2 64M die is only 10 percent larger than SanDisk's 32M flash part and, together with the move to smaller process geometries, will enable annual OEM price reductions of 30 percent while accelerating density increases.

"Without Double Density we don't think we'd be able to drive costs down as fast or as much," said Nelson Chan, SanDisk's VP of marketing.

SanDisk, whose CompactFlash and PCMCIA cards employ a controller, will introduce the 64M chip in 1Q97. The company also will roll out three products based on the technology in 1H97: a $200, 20MB CompactFlash card; a $1,500, 150MB Type II card; and a $3,000 Type II device with 300MB of storage. Fueled by lower cost and higher capacity, future D2 flash-based cards could move into some storage markets presently served by hard disk drives, particularly those applications requiring only modest capacity.

According to Dan Auclair, SanDisk's senior VP of Operations and Technology, D2 flash packs two bits of data in each memory cell, narrowing the programming pulses to double the memory states currently available on traditional flash devices. SanDisk claims to have precisely defined the voltage levels of each state, eliminating concerns that the more tightly packed cell would be difficult to read and that threshold voltage levels would stray slightly over time and decrease data retention longevity.

The Achilles heel of multiple level storage may be that write functions slow significantly--in SanDisk's case to 25 percent of typical one-bit-per-cell flash. Because of this limitation, D2 flash will appear in read-intensive applications such as voice recorders, global positioning satellite systems and handheld inventory control devices that do not require fast write performance. SanDisk said, however, that it will unveil faster versions that overcome this limitation in the future.

Higher bit-per-cell flash is also under development at Intel--where it is referred to as Multi-Level Cell (MLC) technology--and was the subject of a paper delivered at the 1995 International Solid-State Circuits Conference (ISSCC) (EN, Feb. 20, 1995). The technology will appear sometime in 1997 in digital applications, including Intel's Miniature Card device, which is a direct competitor to CompactFlash.

Intel said at present, however, its target markets--digital camera and audio--demand faster write performance than MLC has yet achieved.