Advances outpace SIA roadmap

Electronic News, Dec 16, 1996 by Jim DeTar

San Francisco--The process technology roadmap laid out by the Semiconductor Industry Association (SIA) in 1992, and revised two years ago (EN, Dec. 5, 1994), is becoming outdated as the industry once again outpaces its own prognostications, according to industry executives, including Yoshio Nishi, senior VP of Texas Instruments' Semiconductor group.

In 1994, the revised SIA roadmap was extended out to the year 2010, at which time the group expected that 0.07-micron technology would be coming on-line. That was one generation beyond the original 1992 roadmap, which went out five generations to 0.10-micron in the year 2007.

In an interview with Electronic News here at last week's IEEE-sponsored International Electron Devices Meeting (IEDM), Dr. Nishi said: "Currently, our Semiconductor Process & Device Center (SPDC) is working on a 0.18-micron process, with a channel length of 0.13-micron. In addition, work has started on a .13 micron process. We will bring the 0.18-micron process on-line at 1.5 volt by 1999 and the 0.13-micron process by the end of the year 2002 at 1.2 volt."

TI, which Dr. Nishi admitted in the past has not been known for its aggressive process technology, has instituted what he termed an R&D Progress Pull-Ahead program under which the company intends to accelerate its processes beyond the SIA technology roadmap. TI plans to come on-line with a 0.25-micron process in 1997, two years ahead of the SIA National Technology Roadmap, Dr. Nishi said. The company also plans to bring 0.18 micron on-line by 1999, three years ahead of the roadmap, according to Dr. Nishi.

At IEDM, TI presented 14 papers, 12 of them related to advanced silicon device technology and two related to gallium arsenide (GaAs) devices. One of the papers, titled "A Sub-0.18 micron Gate Length CMOS Technology for High Performance (1.5V) and Low Power (1.0V)," provided a glimpse of the company's next-generation process technology.

Also at IEDM, Intel chairman Gordon Moore said in a keynote address that "The SIA thinks we can cut to significantly below 0.10-micron if the development track is laid down." Dr. Moore jokingly stated that at that level, the industry will be in "violation of Murphy's Law."

Yields have gone up dramatically, he noted. "This is a huge change in the industry. What we've done to improve yields is one of the most impressive achievements of this technology."

Dr. Moore cautioned, however, that "Lithography seems to be the key technology we need to keep moving to keep the whole curve going where we've gone before. We've got a couple more generations relatively clearly, I think. But beyond 0.18-micron, life is going to get more difficult."

As geometries shrink, Dr. Moore said, one key challenge is what to do as the industry nears the atomic level. "We really are approaching some fundamental limits, but it's amazing we've gotten this far." He said he thinks the industry still has a long way to go, however, before it reaches what some industry observers have termed a "wall," as semiconductor channel lengths approach the molecular level.