UPL: the next generation

Electronic News, Dec 16, 1996 by Jerry Worchel

The user programmable logic, or UPL, market, is the truly remarkable story of a technology being in the right place at the right time. With product lifetimes contracting a rapid pace, particularly in the electronic data processing (EDP) market, system manufacturers were looking for an edge that would allow them the ability to get a product to market even faster, and user programmable logic represented that edge. The user programmable logic market has grown from less than $800 million in 1991 to almost $1.7 billion last year. However, no technology (or market) can remain static with regard to capabilities for too long a time, and continue to sustain high growth. The user programmable logic market is no exception to this rule.

In spite of all the advantages user programmable logic gave the end-user, the technology did have several serious drawbacks: higher cost relative to gate array, slower performance relative to gate array and limited programmable density with no mixed-signal capability. It would be these drawbacks, or limitations, that would limit the market's long-term growth potential. Couple this with the technology's inability to accomplish high-level functions, such as microcontroller, digital signal processor and memory. Now you can better understand the technology's long-term limitations. However, that is all changing as user programmable logic takes the next step in its life cycle--adding high-complexity functions to its design arsenal.

Recognizing the increasing demand by system designers for higher complexity designs, user programmable logic suppliers were quick to recognize that their technology lacked this capability. Most notably absent from user programmable logic technology was the implementation of complex functions, high achievable densities (more than 100,000 gates) and analog. Considering UPL's current technology level, increasing density and functional capability would be the obvious, as well as easiest, migration path, yet keeps the technology within the digital realm. In addition, embedded (or core) technology, a design approach for enhancing gate array capability, being similar to user programmable logic technology in many aspects could be used as a springboard. Analog, on the other hand, would be far more complex and time-consuming to implement as its requirements, for both process and design, are significantly different from user programmable logic.

Using embedded, or core, technology, several major user programmable logic suppliers, including Actel, Altera and Xilinx, have recently announced their next-generation products. Whether being called a system programmable gate array, a MegaCore or a LogiCore, they are all based on embedded, or core, technology. Using this approach, user programmable logic suppliers can now offer the market a viable, fast turn-around solution to higher density and complexity design requirements. This will give user programmable logic suppliers a wide variety of new business opportunities, thus allowing them to remain a mainstream technology on a high growth track. Initial product offerings, dependent upon company, will be capable of up to 400,000 gates, with core functions being defined by the end-user.

The blending of core with user programmable logic technology, in this analyst's opinion, represents the "missing link" between current and future UPL market opportunities. A market that might otherwise have been limited in the future, as design complexity, combined with shrinking product size and cost, i.e., put more in a smaller package and sell it for less, would have presented a difficult barrier to overcome. Next step--analog.