Capacity growth forcing new tools, technology

Electronic News, Jan 13, 1997 by Walden C. Rhines

For both Mentor Graphics and the EDA industry in general, 1997 shows every sign of being a very good year. As always, the driving force behind this positive trend is the continued growth in circuit capacity provided by successive generations of ICs. Faster, denser chips provide exciting and innovative design opportunities--but only if EDA technology is able to keep pace and provide tools that match the explosive growth in gatecounts and clock speeds.

In 1997, advances in IC technology will cross a critical threshold, with many chips exceeding gate counts of 1 million, and clock speeds of over 300MHz. Indeed, some devices will exceed 5 million gates and 500MHz-plus. The move across this threshold has been more precipitous than expected, due to an acceleration in implementing submicron technologies. In moving down to 0.8-micron, the IC industry encountered significant obstacles in bringing new processes on line, and thus the capacity available for new design starts was limited.

However, new processes, especially at the 0.35-micron and 0.25-micron level, have benefited from improved device simulation techniques, providing better yields, more process and device modeling technologies, and predictable results. At the same time, the IC equipment community concentrated its efforts on fewer approaches. As a result, the delays encountered in previous generations of ICs have disappeared, and large production capacity is rapidly becoming available.

As design engineers cross this threshold in chip technology, they will need to adopt not only new tools, but also new methodologies that allow the most creative and productive use of all this high-speed silicon real estate. At 0.25-micron feature sizes, interconnect delays nearly equal gate delays as a timing consideration, and the sheer volume of devices per chip creates an enormous mass of information to be processed during design verification. Also, electrical effects such electromigration and cross-talk become significant factors in the design and verification process.

To meet the challenge of designing systems-on-silicon (SOS), EDA companies are providing integrated system design (ISD) approaches. The goal of ISD is to enable designers to work at very high levels of abstraction and employ block-based design, permitting intellectual property from a variety of sources to be combined with custom design information on a single silicon substrate. The ISD approach also provides an integrated set of verification tools that compare at every level of abstraction, from architecture down to IC design rules and parasitic extraction. Within this environment, EDA combines advanced simulation tools with hardware emulation and hardware/software verification tools to give designers full system verification capability.

Reuse of intellectual property is core to the ISD revolution. The ultimate worth of intellectual property is determined by how it is integrated not only into the design, but also into the design process and the tools and methodologies that support the process. Major EDA vendors are ideal suppliers of intellectual property from diverse sources in real custom design flows. Over the past 10 years, Mentor Graphics has made a major commitment to being a provider and distributor of intellectual property in the form of soft cores and physical libraries. This has become one of the company's largest and fastest-growing businesses.

The shift to new submicron design methodologies is creating a very strong demand for professional services in the EDA sector. In 1997, growth in this area should approach 25 percent industry-wide. Within the EDA customer base, two major engineering strategies are forming for the development of complex ICs, and both demand professional services, although of a different nature. One strategy is outsourcing, which moves the entire IC design process out of a company and into the hands of an external vendor. The second is "in-sourcing," where the EDA vendor provides the expertise required to extract maximum productivity from a company's engineering organization. Although Mentor Graphics has focused its large professional services organization on this latter strategy, there will be significant growth opportunities for EDA companies to help customers with either approach.

Another factor behind EDA growth over the next year will be the proliferation of platforms using the Windows NT operating system. The increasing use of NT will require that many EDA tools be re-introduced for this new operating system, and this trend will generate considerable sales activity. Also, 1997 should see a change in the way that the EDA industry is compensated, through the introduction of time-based and use-based licensing, that will be to the mutual benefit of both Mentor Graphics and its customers.