Manufacturing Industry
Motherboard designers get new category of devices
Electronic News, Feb 3, 1997 by Crista Hardie
San Jose, Calif.--A new category of devices is emerging, led by mixed-signal design house, Micro Linear, to allow motherboard designers to squeeze 10 percent more performance out of memory chips.
Designed to work with the SSTL (Series Stub Terminated Logic) memory bus interface sported by new, faster DRAM architectures that serve bandwidth-hungry graphics applications, the ML6550 active bus terminator brings in control functions to limit the amount of current sent across the bus, and cuts power consumption by reducing the number of components on the board.
"The chip comes at a time when engineers are under increasing pressure to find additional bandwidth to keep up with higher processor speeds, higher resolution video and 3-D graphics," said Tony Ochoa, product marketing manager for Micro Linear. The company is offering the ML6550 in full production now. Sold in an 8-pin SOIC, the chip is $2.03, based on orders of 1,000.
Along with a shift to faster memory architectures came a shift to the SSTL interface, an I/O technique defined by JEDEC to boost memory bus speeds above 100MHz. Most of the top DRAM makers are now shipping synchronous DRAM (SDRAM), and variations of the architecture optimized for graphics, like SGDRAM and MDRAM (the Mosys-proprietary multibank memory technology), all carrying the SSTL interface. Chipsets with the SSTL interface should be on the market soon, observers noted.
SSTL uses a 500 milliwatt (mW) separation between the voltages (1.5V-1.1V) that allows the bus to run faster because its signals do not need to change as much. The hitch is, higher speed operation makes the bus more susceptible to noise from voltage reflections and echoes. Enter active termination.
Micro Linear designed the ML6550 active memory bus terminator to deliver the precise amount of current needed to quiet noise and ringing on bus lines. Passive alternatives, on the other hand, pump a steady stream of current to the bus, regardless of need.
A single ML6550 can terminate 40 bus lines, eliminating 40 passive resistors that would otherwise be used. So, for example, a typical 40-line bus using the ML6550 active terminator consumes a claimed 25 mW, or 0.625 mW per line. In contrast, a passively terminated bus might consume 2.5W of power, or 62.5 mW per line, Micro Linear said.
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