VLSI to unveil 0.25-micron ASIC line, roadmap

Electronic News, April 28, 1997 by Peter Brown

VLSI will introduce two families manufactured on a 0.25 micron (1.8 micron drawn) and 0.2 micron (1.5 drawn) process, dubbed the VSC9 and VSC10 lines, respectively. Each family will have six layers of metal, a density of up to 18 million raw (14 million usable) gates, and utilize VLSI's trench architecture.

Both families will be offered in the standard cell format which is rapidly becoming the preferred ASIC format of choice among the major vendors. VLSI has no plans for a gate array family and neither do competitors NEC, LSI Logic or Toshiba.

"Standard cell is the bread and butter of VLSI and we do some embedded arrays but tend to stay clear of gate arrays normally," said Bob Payne, VP of strategic technology for VLSI. "We wanted to roll out devices that have the proper voltages, that would not compromise density, power, speed or performance in a customer's design. We wanted the whole package. The VSC9 and VSC10 realize our goals."

The ASIC families have a claimed 2.4x performance boost over VLSI's 0.35 micron ASICs and are geared toward embedded intellectual property cores, according to Dr. Martin H. Manley, director of device/process integration for technology development at VLSI.

VLSI is currently not focused on embedded DRAM ASICs but does have embedded SRAM cores in its library. According to Mr. Payne, though, the VSC9 and VSC10 are manufactured for embedded DRAM, so that if the technology becomes available the devices will be ready for implementation. VLSI is currently working with various partners to bring embedded DRAM to its ASICs and will be looking to make a significant investment in the near future, said Mr. Payne.

The VSC9 and VSC10 will be available for prototyping this summer, and production for the VSC9 is slated to begin in late 1997. Production for the VSC10 is planned for the quarter after that. Prices for the two ASIC families vary depending on density, voltage and intellectual property, Mr. Payne said.

When asked if the world is ready for 1.8 voltage levels, Mr. Payne said that "Systems people will have a hard time determining what will be the applications that 2.5 and 1.8 volts will be used for. However, we want each system to have the ability to utilize this voltage if their applications require it." VLSI said this density and voltage would target the bleeding edge applications such as workstations and high-performance PC vendors.

VLSI will integrate its core and pad libraries for the VSC9 and VSC10 families as well. The ARM RISC core, Hitachi Super H block, and DSP Group's Oak DSP core, as well as interface, memory and mixed-signal cores will all be ported to the two families, VLSI said.