Manufacturing Industry

Actel unveils strategy to promote HLD usage

Electronic News, June 16, 1997

"Moving to a HLD methodology is a natural progression in the design world," said Dennis Nye, VP of marketing for Actel. "We are focusing on the higher end of the spectrum--8,000 gates and above. HLD designs have no use in anything below that, frankly. Synthesis in the last few years has become extremely important to FPGAs. It speeds up productivity while sometimes enhancing performance along the way."

The initial aspects of Actel's strategy will unfold in the next few months, Actel said, when the company plans to introduce the Designer Series 3.1.1 tool suite that will feature an updated version of the company's latest design tools and HLD tool suites.

The tool suite will include the ACTgen macro builder, Actel's datapath macro generation software, DirectTime place and route tool and PinEdit, a drag-and-drop signal placement utility. The Designer Series 3.1.1 is planned to run on both PC and Unix platforms.

The second prong will come from the expansion of the ViewLogic agreement that Actel signed recently to include a complete suite of HLD tools that will be available directly from Actel. The Designer Series will include ViewLogic's ViewSynthesis FPGA synthesis, SpeedWave VHDL simulator, and Workview office schematic-based tools, Mr. Nye said.

The final aspect to Actel's tool strategy will be to distribute the FPGA tools over the World Wide Web. Actel plans to have the tools on its web later this summer.

In addition, Actel plans to reduce the price of the tools, by up to 60 percent in some cases.

Mr. Nye said since Actel is mainly an antifuse FPGA company, it is in a good position to lead the market in synthesis. "Synthesis mainly came out of the gate array world, which is fine grained in architecture. However, most FPGAs are not fine grained so synthesis was far more difficult than most people originally thought," he said.

Commenting on the agreement between Mentor Graphics and Synopsys--that was signed here at DAC--which will enable Synopsys' cell-based array (CBA) ASIC architecture to incorporate all of Mentor Graphics Inventra business unit's intellectual property, Mr. Nye said, "It is a perfect fit for us. We were trying to figure out what IP we should put in the CBA and now we won't have to worry about it."

COPYRIGHT 1997 Reed Business Information, Inc. (US)
COPYRIGHT 2008 Gale, Cengage Learning

 

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